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-rw-r--r--llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll b/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
index 12af3cef4e5..06a4d90dfeb 100644
--- a/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
+++ b/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
@@ -1,11 +1,10 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN %s
; Make sure dbg_value reports something for argument registers when they are split into multiple registers
define hidden <4 x float> @split_v4f32_arg(<4 x float> returned %arg) local_unnamed_addr #0 !dbg !7 {
; GCN-LABEL: split_v4f32_arg:
; GCN: .Lfunc_begin0:
-; GCN-NEXT: .file 0 "/tmp/dbg.cl" md5 0x0f834f91e91489a5ff6308040ddbd175
+; GCN-NEXT: .file 0
; GCN-NEXT: .loc 0 3 0 ; /tmp/dbg.cl:3:0
; GCN-NEXT: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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