diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/combine-sdiv.ll | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/combine-sdiv.ll b/llvm/test/CodeGen/X86/combine-sdiv.ll index 665634527c8..c404b174b0d 100644 --- a/llvm/test/CodeGen/X86/combine-sdiv.ll +++ b/llvm/test/CodeGen/X86/combine-sdiv.ll @@ -202,6 +202,31 @@ define <4 x i32> @combine_vec_sdiv_by_pow2a(<4 x i32> %x) { ret <4 x i32> %1 } +define <4 x i32> @combine_vec_sdiv_by_pow2a_neg(<4 x i32> %x) { +; SSE-LABEL: combine_vec_sdiv_by_pow2a_neg: +; SSE: # %bb.0: +; SSE-NEXT: movdqa %xmm0, %xmm1 +; SSE-NEXT: psrad $31, %xmm1 +; SSE-NEXT: psrld $30, %xmm1 +; SSE-NEXT: paddd %xmm0, %xmm1 +; SSE-NEXT: psrad $2, %xmm1 +; SSE-NEXT: pxor %xmm0, %xmm0 +; SSE-NEXT: psubd %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: combine_vec_sdiv_by_pow2a_neg: +; AVX: # %bb.0: +; AVX-NEXT: vpsrad $31, %xmm0, %xmm1 +; AVX-NEXT: vpsrld $30, %xmm1, %xmm1 +; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vpsrad $2, %xmm0, %xmm0 +; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vpsubd %xmm0, %xmm1, %xmm0 +; AVX-NEXT: retq + %1 = sdiv <4 x i32> %x, <i32 -4, i32 -4, i32 -4, i32 -4> + ret <4 x i32> %1 +} + define <16 x i8> @combine_vec_sdiv_by_pow2b_v16i8(<16 x i8> %x) { ; SSE-LABEL: combine_vec_sdiv_by_pow2b_v16i8: ; SSE: # %bb.0: |
