diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 37 |
1 files changed, 7 insertions, 30 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 6e6edce4de7..36e39c16e75 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -12590,8 +12590,8 @@ static SDValue lower256BitVectorShuffle(const SDLoc &DL, ArrayRef<int> Mask, } } -/// \brief Try to lower a vector shuffle as a 256-bit shuffle. -static SDValue lowerV2X256VectorShuffle(const SDLoc &DL, MVT VT, +/// \brief Try to lower a vector shuffle as a 128-bit shuffles. +static SDValue lowerV4X128VectorShuffle(const SDLoc &DL, MVT VT, ArrayRef<int> Mask, SDValue V1, SDValue V2, SelectionDAG &DAG) { assert(VT.getScalarSizeInBits() == 64 && @@ -12601,16 +12601,16 @@ static SDValue lowerV2X256VectorShuffle(const SDLoc &DL, MVT VT, // function lowerV2X128VectorShuffle() is better solution. assert(VT.is512BitVector() && "Unexpected vector size for 512bit shuffle."); - assert(Mask.size() == 4 && "Expect mask to already be widened to 128-bits."); - - SmallVector<int, 2> WidenedMask; + SmallVector<int, 4> WidenedMask; if (!canWidenShuffleElements(Mask, WidenedMask)) return SDValue(); // Check for patterns which can be matched with a single insert of a 256-bit // subvector. - bool OnlyUsesV1 = isShuffleEquivalent(V1, V2, WidenedMask, {0, 0}); - if (OnlyUsesV1 || isShuffleEquivalent(V1, V2, WidenedMask, {0, 2})) { + bool OnlyUsesV1 = isShuffleEquivalent(V1, V2, Mask, + {0, 1, 2, 3, 0, 1, 2, 3}); + if (OnlyUsesV1 || isShuffleEquivalent(V1, V2, Mask, + {0, 1, 2, 3, 8, 9, 10, 11})) { MVT SubVT = MVT::getVectorVT(VT.getVectorElementType(), VT.getVectorNumElements() / 2); SDValue LoV = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, V1, @@ -12621,29 +12621,6 @@ static SDValue lowerV2X256VectorShuffle(const SDLoc &DL, MVT VT, return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, LoV, HiV); } - return SDValue(); -} - -/// \brief Try to lower a vector shuffle as a 128-bit shuffles. -static SDValue lowerV4X128VectorShuffle(const SDLoc &DL, MVT VT, - ArrayRef<int> Mask, SDValue V1, - SDValue V2, SelectionDAG &DAG) { - assert(VT.getScalarSizeInBits() == 64 && - "Unexpected element type size for 128bit shuffle."); - - // To handle 256 bit vector requires VLX and most probably - // function lowerV2X128VectorShuffle() is better solution. - assert(VT.is512BitVector() && "Unexpected vector size for 512bit shuffle."); - - SmallVector<int, 4> WidenedMask; - if (!canWidenShuffleElements(Mask, WidenedMask)) - return SDValue(); - - // See if we can widen even further to a 256-bit element. - if (SDValue Shuf256 = lowerV2X256VectorShuffle(DL, VT, WidenedMask, V1, V2, - DAG)) - return Shuf256; - SDValue Ops[2] = {DAG.getUNDEF(VT), DAG.getUNDEF(VT)}; // Insure elements came from the same Op. int MaxOp1Index = VT.getVectorNumElements()/2 - 1; |
