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-rw-r--r--llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp2
-rw-r--r--llvm/test/CodeGen/PowerPC/pr36068.ll18
2 files changed, 20 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
index 8a5fb9fdaef..3af2ab9cb79 100644
--- a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
+++ b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
@@ -519,6 +519,8 @@ bool PPCVSXSwapRemoval::gatherVectorInstructions() {
// permute control vectors (for shift values 1, 2, 3). However,
// VPERM has a more restrictive register class.
case PPC::XXSLDWI:
+ case PPC::XSCVDPSPN:
+ case PPC::XSCVSPDPN:
break;
}
}
diff --git a/llvm/test/CodeGen/PowerPC/pr36068.ll b/llvm/test/CodeGen/PowerPC/pr36068.ll
new file mode 100644
index 00000000000..aac659bfb70
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/pr36068.ll
@@ -0,0 +1,18 @@
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s | \
+; RUN: FileCheck %s
+
+@glob = common local_unnamed_addr global <4 x float> zeroinitializer, align 4
+
+; Function Attrs: norecurse nounwind
+define void @test(float %a, <4 x float>* nocapture readonly %b) {
+; CHECK-LABEL: test
+; CHECK: xscvdpspn [[REG:[0-9]+]], 1
+; CHECK: xxspltw {{[0-9]+}}, [[REG]], 0
+entry:
+ %splat.splatinsert = insertelement <4 x float> undef, float %a, i32 0
+ %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer
+ %0 = load <4 x float>, <4 x float>* %b, align 4
+ %mul = fmul <4 x float> %splat.splat, %0
+ store <4 x float> %mul, <4 x float>* @glob, align 4
+ ret void
+}
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