diff options
-rw-r--r-- | llvm/lib/IR/AutoUpgrade.cpp | 7 | ||||
-rw-r--r-- | llvm/test/Bitcode/aarch64-addp-upgrade.bc | bin | 0 -> 1136 bytes | |||
-rw-r--r-- | llvm/test/Bitcode/aarch64-addp-upgrade.ll | 18 |
3 files changed, 21 insertions, 4 deletions
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index ecd1a12c2e5..6e2beeb839b 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -585,11 +585,10 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { if (Name.startswith("aarch64.neon.addp")) { if (F->arg_size() != 2) break; // Invalid IR. - auto fArgs = F->getFunctionType()->params(); - VectorType *ArgTy = dyn_cast<VectorType>(fArgs[0]); - if (ArgTy && ArgTy->getElementType()->isFloatingPointTy()) { + VectorType *Ty = dyn_cast<VectorType>(F->getReturnType()); + if (Ty && Ty->getElementType()->isFloatingPointTy()) { NewFn = Intrinsic::getDeclaration(F->getParent(), - Intrinsic::aarch64_neon_faddp, fArgs); + Intrinsic::aarch64_neon_faddp, Ty); return true; } } diff --git a/llvm/test/Bitcode/aarch64-addp-upgrade.bc b/llvm/test/Bitcode/aarch64-addp-upgrade.bc Binary files differnew file mode 100644 index 00000000000..a359b445f17 --- /dev/null +++ b/llvm/test/Bitcode/aarch64-addp-upgrade.bc diff --git a/llvm/test/Bitcode/aarch64-addp-upgrade.ll b/llvm/test/Bitcode/aarch64-addp-upgrade.ll new file mode 100644 index 00000000000..4e78996aa0b --- /dev/null +++ b/llvm/test/Bitcode/aarch64-addp-upgrade.ll @@ -0,0 +1,18 @@ +; RUN: llvm-dis %p/aarch64-addp-upgrade.bc -o - | FileCheck %s + +; Bitcode was generated from file below, which may or may not even assemble any +; more. + +; CHECK: call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %lhs, <2 x float> %rhs) +define <2 x float> @test_addp(<2 x float> %lhs, <2 x float> %rhs) { + %res = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %lhs, <2 x float> %rhs) + ret <2 x float> %res +} + +; CHECK: call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %lhs, <2 x float> %rhs) +define <2 x float> @test_addp1(<2 x float> %lhs, <2 x float> %rhs) { + %res = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %lhs, <2 x float> %rhs) + ret <2 x float> %res +} + +declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>) |