diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 27 |
2 files changed, 31 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp index 27bd191b93e..dde8fdccb73 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp @@ -528,8 +528,11 @@ bool AMDGPUInstructionSelector::selectG_LOAD(MachineInstr &I) const { bool AMDGPUInstructionSelector::select(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { - if (!isPreISelGenericOpcode(I.getOpcode())) + if (!isPreISelGenericOpcode(I.getOpcode())) { + if (I.isCopy()) + return selectCOPY(I); return true; + } switch (I.getOpcode()) { default: diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir new file mode 100644 index 00000000000..495acf63472 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir @@ -0,0 +1,27 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN + +--- | + define amdgpu_kernel void @copy(i32 addrspace(1)* %global0) {ret void} +... +--- + +name: copy +legalized: true +regBankSelected: true + + +body: | + bb.0: + liveins: $sgpr2_sgpr3 + ; GCN-LABEL: name: copy + ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr2_sgpr3 + ; GCN: [[COPY1:%[0-9]+]]:vreg_64 = COPY [[COPY]] + ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF + ; GCN: FLAT_STORE_DWORD [[COPY1]], [[DEF]], 0, 0, 0, implicit $exec, implicit $flat_scr + %0:sgpr(s64) = COPY $sgpr2_sgpr3 + %1:vgpr(s64) = COPY %0 + %2:vgpr(s32) = G_IMPLICIT_DEF + G_STORE %2, %1 :: (store 4 into %ir.global0) +... +--- |
