diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp index bf6b7c55a69..92d59569226 100644 --- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp +++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp @@ -166,6 +166,8 @@ static bool updateOperand(FoldCandidate &Fold, if (TargetRegisterInfo::isVirtualRegister(Old.getReg()) && TargetRegisterInfo::isVirtualRegister(New->getReg())) { Old.substVirtReg(New->getReg(), New->getSubReg(), TRI); + + Old.setIsUndef(New->isUndef()); return true; } diff --git a/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir b/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir index 4d8e608c947..ed78ccc9b61 100644 --- a/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir +++ b/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir @@ -864,16 +864,22 @@ body: | # There is only an undef use operand for %1, so there is no # corresponding defining instruction +# GCN-LABEL: name: undefined_vreg_operand{{$}} +# GCN: bb.0 +# GCN-NEXT: FLAT_STORE_DWORD undef %3, undef %1, +# GCN-NEXT: S_ENDPGM name: undefined_vreg_operand tracksRegLiveness: true registers: - { id: 0, class: vgpr_32, preferred-register: '' } - { id: 1, class: vgpr_32, preferred-register: '' } - { id: 2, class: vgpr_32, preferred-register: '' } + - { id: 3, class: vreg_64, preferred-register: '' } body: | bb.0: %0 = V_MOV_B32_e32 0, implicit %exec %2 = V_XOR_B32_e64 killed %0, undef %1, implicit %exec + FLAT_STORE_DWORD undef %3, %2, 0, 0, 0, implicit %exec, implicit %flat_scr S_ENDPGM ... |
