diff options
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocFast.cpp | 11 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir | 26 |
2 files changed, 32 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp index 6a5282cbbbf..17d9492d942 100644 --- a/llvm/lib/CodeGen/RegAllocFast.cpp +++ b/llvm/lib/CodeGen/RegAllocFast.cpp @@ -193,9 +193,10 @@ namespace { void spillVirtReg(MachineBasicBlock::iterator MI, unsigned VirtReg); void usePhysReg(MachineOperand &MO); - void definePhysReg(MachineInstr &MI, MCPhysReg PhysReg, RegState NewState); + void definePhysReg(MachineBasicBlock::iterator MI, MCPhysReg PhysReg, + RegState NewState); unsigned calcSpillCost(MCPhysReg PhysReg) const; - void assignVirtToPhysReg(LiveReg&, MCPhysReg PhysReg); + void assignVirtToPhysReg(LiveReg &, MCPhysReg PhysReg); LiveRegMap::iterator findLiveVirtReg(unsigned VirtReg) { return LiveVirtRegs.find(TargetRegisterInfo::virtReg2Index(VirtReg)); @@ -434,8 +435,8 @@ void RegAllocFast::usePhysReg(MachineOperand &MO) { /// Mark PhysReg as reserved or free after spilling any virtregs. This is very /// similar to defineVirtReg except the physreg is reserved instead of /// allocated. -void RegAllocFast::definePhysReg(MachineInstr &MI, MCPhysReg PhysReg, - RegState NewState) { +void RegAllocFast::definePhysReg(MachineBasicBlock::iterator MI, + MCPhysReg PhysReg, RegState NewState) { markRegUsedInInstr(PhysReg); switch (unsigned VirtReg = PhysRegState[PhysReg]) { case regDisabled: @@ -857,7 +858,7 @@ void RegAllocFast::allocateBasicBlock(MachineBasicBlock &MBB) { // Add live-in registers as live. for (const MachineBasicBlock::RegisterMaskPair LI : MBB.liveins()) if (MRI->isAllocatable(LI.PhysReg)) - definePhysReg(*MII, LI.PhysReg, regReserved); + definePhysReg(MII, LI.PhysReg, regReserved); VirtDead.clear(); Coalesced.clear(); diff --git a/llvm/test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir b/llvm/test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir new file mode 100644 index 00000000000..fc19173a176 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir @@ -0,0 +1,26 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple aarch64-apple-ios -run-pass regallocfast -o - %s | FileCheck %s +# This test used to crash the fast register alloc. +# Basically, when a basic block has liveins, the fast regalloc +# was deferencing the begin iterator of this block. However, +# when this block is empty and it will just crashed! +--- +name: crashing +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: crashing + ; CHECK: bb.0: + ; CHECK: successors: %bb.1(0x80000000) + ; CHECK: liveins: %x0, %x1 + ; CHECK: bb.1: + ; CHECK: renamable %w0 = MOVi32imm -1 + ; CHECK: RET_ReallyLR implicit killed %w0 + bb.1: + liveins: %x0, %x1 + + bb.2: + %0:gpr32 = MOVi32imm -1 + %w0 = COPY %0 + RET_ReallyLR implicit %w0 + +... |
