summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td20
-rw-r--r--llvm/test/CodeGen/Thumb2/thumb2-bfc.ll6
2 files changed, 16 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index b3a52d65f17..17e7365962b 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -168,16 +168,16 @@ def bf_inv_mask_imm : Operand<i32>,
uint32_t v = (uint32_t)N->getZExtValue();
if (v == 0xffffffff)
return 0;
- // naive checker. should do better, but simple is best for now since it's
- // more likely to be correct.
- while (v & 1) v >>= 1; // shift off the leading 1's
- if (v)
- {
- while (!(v & 1)) v >>=1; // shift off the mask
- while (v & 1) v >>= 1; // shift off the trailing 1's
- }
- // if this is a mask for clearing a bitfield, what's left should be zero.
- return (v == 0);
+ // there can be 1's on either or both "outsides", all the "inside"
+ // bits must be 0's
+ unsigned int lsb = 0, msb = 31;
+ while (v & (1 << msb)) --msb;
+ while (v & (1 << lsb)) ++lsb;
+ for (unsigned int i = lsb; i <= msb; ++i) {
+ if (v & (1 << i))
+ return 0;
+ }
+ return 1;
}] > {
let PrintMethod = "printBitfieldInvMaskImmOperand";
}
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-bfc.ll b/llvm/test/CodeGen/Thumb2/thumb2-bfc.ll
index 1e5016c9129..a612b9bb888 100644
--- a/llvm/test/CodeGen/Thumb2/thumb2-bfc.ll
+++ b/llvm/test/CodeGen/Thumb2/thumb2-bfc.ll
@@ -17,3 +17,9 @@ define i32 @f3(i32 %a) {
%tmp = and i32 %a, 4095
ret i32 %tmp
}
+
+; 2147483646 = 0x7ffffffe not implementable w/ BFC
+define i32 @f4(i32 %a) {
+ %tmp = and i32 %a, 2147483646
+ ret i32 %tmp
+}
OpenPOWER on IntegriCloud