diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrCompiler.td | 40 |
2 files changed, 34 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b89b2b6e720..cb79484d26e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -27464,7 +27464,9 @@ static bool isCMOVPseudo(MachineInstr &MI) { case X86::CMOV_RFP64: case X86::CMOV_RFP80: case X86::CMOV_VR128: + case X86::CMOV_VR128X: case X86::CMOV_VR256: + case X86::CMOV_VR256X: case X86::CMOV_VR512: case X86::CMOV_VK8: case X86::CMOV_VK16: @@ -29060,7 +29062,9 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, case X86::CMOV_RFP64: case X86::CMOV_RFP80: case X86::CMOV_VR128: + case X86::CMOV_VR128X: case X86::CMOV_VR256: + case X86::CMOV_VR256X: case X86::CMOV_VR512: case X86::CMOV_VK8: case X86::CMOV_VK16: diff --git a/llvm/lib/Target/X86/X86InstrCompiler.td b/llvm/lib/Target/X86/X86InstrCompiler.td index 5b55da781e0..8b6d31cba50 100644 --- a/llvm/lib/Target/X86/X86InstrCompiler.td +++ b/llvm/lib/Target/X86/X86InstrCompiler.td @@ -590,8 +590,14 @@ let usesCustomInserter = 1, hasNoSchedulingInfo = 1, Uses = [EFLAGS] in { defm _FR32 : CMOVrr_PSEUDO<FR32, f32>; defm _FR64 : CMOVrr_PSEUDO<FR64, f64>; - defm _VR128 : CMOVrr_PSEUDO<VR128, v2i64>; - defm _VR256 : CMOVrr_PSEUDO<VR256, v4i64>; + let Predicates = [NoVLX] in { + defm _VR128 : CMOVrr_PSEUDO<VR128, v2i64>; + defm _VR256 : CMOVrr_PSEUDO<VR256, v4i64>; + } + let Predicates = [HasVLX] in { + defm _VR128X : CMOVrr_PSEUDO<VR128X, v2i64>; + defm _VR256X : CMOVrr_PSEUDO<VR256X, v4i64>; + } defm _VR512 : CMOVrr_PSEUDO<VR512, v8i64>; defm _VK8 : CMOVrr_PSEUDO<VK8, v8i1>; defm _VK16 : CMOVrr_PSEUDO<VK16, v16i1>; @@ -601,14 +607,28 @@ let usesCustomInserter = 1, hasNoSchedulingInfo = 1, Uses = [EFLAGS] in { def : Pat<(f128 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)), (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>; -def : Pat<(v4f32 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)), - (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>; -def : Pat<(v2f64 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)), - (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>; -def : Pat<(v8f32 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)), - (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>; -def : Pat<(v4f64 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)), - (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>; + +let Predicates = [NoVLX] in { + def : Pat<(v4f32 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)), + (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>; + def : Pat<(v2f64 (X86cmov VR128:$t, VR128:$f, imm:$cond, EFLAGS)), + (CMOV_VR128 VR128:$t, VR128:$f, imm:$cond)>; + def : Pat<(v8f32 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)), + (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>; + def : Pat<(v4f64 (X86cmov VR256:$t, VR256:$f, imm:$cond, EFLAGS)), + (CMOV_VR256 VR256:$t, VR256:$f, imm:$cond)>; +} +let Predicates = [HasVLX] in { + def : Pat<(v4f32 (X86cmov VR128X:$t, VR128X:$f, imm:$cond, EFLAGS)), + (CMOV_VR128X VR128X:$t, VR128X:$f, imm:$cond)>; + def : Pat<(v2f64 (X86cmov VR128X:$t, VR128X:$f, imm:$cond, EFLAGS)), + (CMOV_VR128X VR128X:$t, VR128X:$f, imm:$cond)>; + def : Pat<(v8f32 (X86cmov VR256X:$t, VR256X:$f, imm:$cond, EFLAGS)), + (CMOV_VR256X VR256X:$t, VR256X:$f, imm:$cond)>; + def : Pat<(v4f64 (X86cmov VR256X:$t, VR256X:$f, imm:$cond, EFLAGS)), + (CMOV_VR256X VR256X:$t, VR256X:$f, imm:$cond)>; +} + def : Pat<(v16f32 (X86cmov VR512:$t, VR512:$f, imm:$cond, EFLAGS)), (CMOV_VR512 VR512:$t, VR512:$f, imm:$cond)>; def : Pat<(v8f64 (X86cmov VR512:$t, VR512:$f, imm:$cond, EFLAGS)), |
