diff options
| -rw-r--r-- | llvm/lib/Analysis/DemandedBits.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/Analysis/DemandedBits/basic.ll | 31 | ||||
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll | 34 |
3 files changed, 0 insertions, 72 deletions
diff --git a/llvm/lib/Analysis/DemandedBits.cpp b/llvm/lib/Analysis/DemandedBits.cpp index 29cb9706b9b..841d1c8f4a8 100644 --- a/llvm/lib/Analysis/DemandedBits.cpp +++ b/llvm/lib/Analysis/DemandedBits.cpp @@ -241,13 +241,6 @@ void DemandedBits::determineLiveOperandBits( if (OperandNo != 0) AB = AOut; break; - case Instruction::ICmp: - // Count the number of leading zeroes in each operand. - ComputeKnownBits(BitWidth, UserI->getOperand(0), UserI->getOperand(1)); - auto NumLeadingZeroes = std::min(KnownZero.countLeadingOnes(), - KnownZero2.countLeadingOnes()); - AB = ~APInt::getHighBitsSet(BitWidth, NumLeadingZeroes); - break; } } diff --git a/llvm/test/Analysis/DemandedBits/basic.ll b/llvm/test/Analysis/DemandedBits/basic.ll index 9973edf79c1..3fd1b321288 100644 --- a/llvm/test/Analysis/DemandedBits/basic.ll +++ b/llvm/test/Analysis/DemandedBits/basic.ll @@ -10,34 +10,3 @@ define i8 @test_mul(i32 %a, i32 %b) { %3 = trunc i32 %2 to i8 ret i8 %3 } - -; CHECK-LABEL: 'test_icmp1' -; CHECK-DAG: DemandedBits: 0x1 for %3 = icmp eq i32 %1, %2 -; CHECK-DAG: DemandedBits: 0xFFF for %1 = and i32 %a, 255 -; CHECK-DAG: DemandedBits: 0xFFF for %2 = shl i32 %1, 4 -define i1 @test_icmp1(i32 %a, i32 %b) { - %1 = and i32 %a, 255 - %2 = shl i32 %1, 4 - %3 = icmp eq i32 %1, %2 - ret i1 %3 -} - -; CHECK-LABEL: 'test_icmp2' -; CHECK-DAG: DemandedBits: 0x1 for %3 = icmp eq i32 %1, %2 -; CHECK-DAG: DemandedBits: 0xFFF for %1 = and i32 %a, 255 -; CHECK-DAG: DemandedBits: 0xFF for %2 = ashr i32 %1, 4 -define i1 @test_icmp2(i32 %a, i32 %b) { - %1 = and i32 %a, 255 - %2 = ashr i32 %1, 4 - %3 = icmp eq i32 %1, %2 - ret i1 %3 -} - -; CHECK-LABEL: 'test_icmp3' -; CHECK-DAG: DemandedBits: 0xFFFFFFFF for %1 = and i32 %a, 255 -; CHECK-DAG: DemandedBits: 0x1 for %2 = icmp eq i32 -1, %1 -define i1 @test_icmp3(i32 %a) { - %1 = and i32 %a, 255 - %2 = icmp eq i32 -1, %1 - ret i1 %2 -} diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll b/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll index eee31049180..51f899c2f64 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll @@ -205,39 +205,5 @@ for.body: ; preds = %for.body, %for.body br i1 %exitcond, label %for.cond.cleanup, label %for.body } -; CHECK-LABEL: @add_g -; CHECK: load <16 x i8> -; CHECK: xor <16 x i8> -; CHECK: icmp ult <16 x i8> -; CHECK: select <16 x i1> {{.*}}, <16 x i8> -; CHECK: store <16 x i8> -define void @add_g(i8* noalias nocapture readonly %p, i8* noalias nocapture readonly %q, i8* noalias nocapture %r, i8 %arg1, i32 %len) #0 { - %1 = icmp sgt i32 %len, 0 - br i1 %1, label %.lr.ph, label %._crit_edge - -.lr.ph: ; preds = %0 - %2 = sext i8 %arg1 to i64 - br label %3 - -._crit_edge: ; preds = %3, %0 - ret void - -; <label>:3 ; preds = %3, %.lr.ph - %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %3 ] - %x4 = getelementptr inbounds i8, i8* %p, i64 %indvars.iv - %x5 = load i8, i8* %x4 - %x7 = getelementptr inbounds i8, i8* %q, i64 %indvars.iv - %x8 = load i8, i8* %x7 - %x9 = zext i8 %x5 to i32 - %x10 = xor i32 %x9, 255 - %x11 = icmp ult i32 %x10, 24 - %x12 = select i1 %x11, i32 %x10, i32 24 - %x13 = trunc i32 %x12 to i8 - store i8 %x13, i8* %x4 - %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 - %lftr.wideiv = trunc i64 %indvars.iv.next to i32 - %exitcond = icmp eq i32 %lftr.wideiv, %len - br i1 %exitcond, label %._crit_edge, label %3 -} attributes #0 = { nounwind } |
