diff options
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 183 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrVector.td | 109 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/SystemZ/insns-z13.txt | 888 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/insn-bad-z13.s | 442 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/insn-good-z13.s | 1633 |
5 files changed, 3237 insertions, 18 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td index 4b63f229cee..ba5c2d2d865 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td +++ b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td @@ -1759,6 +1759,10 @@ class UnaryVRIa<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M3 = type; } +class UnaryVRIaGeneric<string mnemonic, bits<16> opcode, Immediate imm> + : InstVRIa<opcode, (outs VR128:$V1), (ins imm:$I2, imm32zx4:$M3), + mnemonic#"\t$V1, $I2, $M3", []>; + class UnaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> type = 0, bits<4> m4 = 0, bits<4> m5 = 0> @@ -1770,6 +1774,21 @@ class UnaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M5 = m5; } +class UnaryVRRaGeneric<string mnemonic, bits<16> opcode, bits<4> m4 = 0, + bits<4> m5 = 0> + : InstVRRa<opcode, (outs VR128:$V1), (ins VR128:$V2, imm32zx4:$M3), + mnemonic#"\t$V1, $V2, $M3", []> { + let M4 = m4; + let M5 = m5; +} + +class UnaryVRRaFloatGeneric<string mnemonic, bits<16> opcode, bits<4> m5 = 0> + : InstVRRa<opcode, (outs VR128:$V1), + (ins VR128:$V2, imm32zx4:$M3, imm32zx4:$M4), + mnemonic#"\t$V1, $V2, $M3, $M4", []> { + let M5 = m5; +} + // Declare a pair of instructions, one which sets CC and one which doesn't. // The CC-setting form ends with "S" and sets the low bit of M5. // The form that does not set CC has an extra operand to optionally allow @@ -1791,6 +1810,16 @@ multiclass UnaryExtraVRRaSPair<string mnemonic, bits<16> opcode, type, 0, 1>; } +multiclass UnaryExtraVRRaSPairGeneric<string mnemonic, bits<16> opcode> { + let M4 = 0 in + def "" : InstVRRa<opcode, (outs VR128:$V1), + (ins VR128:$V2, imm32zx4:$M3, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $M3, $M5", []>; + def : InstAlias<mnemonic#"\t$V1, $V2, $M3", + (!cast<Instruction>(NAME) VR128:$V1, VR128:$V2, + imm32zx4:$M3, 0)>; +} + class UnaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr, bits<5> bytes, bits<4> type = 0> : InstVRX<opcode, (outs tr.op:$V1), (ins bdxaddr12only:$XBD2), @@ -1801,6 +1830,12 @@ class UnaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator, let AccessBytes = bytes; } +class UnaryVRXGeneric<string mnemonic, bits<16> opcode> + : InstVRX<opcode, (outs VR128:$V1), (ins bdxaddr12only:$XBD2, imm32zx4:$M3), + mnemonic#"\t$V1, $XBD2, $M3", []> { + let mayLoad = 1; +} + class BinaryRR<string mnemonic, bits<8> opcode, SDPatternOperator operator, RegisterOperand cls1, RegisterOperand cls2> : InstRR<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2), @@ -2021,6 +2056,11 @@ class BinaryVRIb<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M4 = type; } +class BinaryVRIbGeneric<string mnemonic, bits<16> opcode> + : InstVRIb<opcode, (outs VR128:$V1), + (ins imm32zx8:$I2, imm32zx8:$I3, imm32zx4:$M4), + mnemonic#"\t$V1, $I2, $I3, $M4", []>; + class BinaryVRIc<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> type> : InstVRIc<opcode, (outs tr1.op:$V1), (ins tr2.op:$V3, imm32zx16:$I2), @@ -2030,6 +2070,11 @@ class BinaryVRIc<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M4 = type; } +class BinaryVRIcGeneric<string mnemonic, bits<16> opcode> + : InstVRIc<opcode, (outs VR128:$V1), + (ins VR128:$V3, imm32zx16:$I2, imm32zx4:$M4), + mnemonic#"\t$V1, $V3, $I2, $M4", []>; + class BinaryVRIe<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> type, bits<4> m5> : InstVRIe<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, imm32zx12:$I3), @@ -2040,13 +2085,26 @@ class BinaryVRIe<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M5 = m5; } -class BinaryVRRa<string mnemonic, bits<16> opcode> - : InstVRRa<opcode, (outs VR128:$V1), (ins VR128:$V2, imm32zx4:$M3), - mnemonic#"\t$V1, $V2, $M3", []> { - let M4 = 0; - let M5 = 0; +class BinaryVRIeFloatGeneric<string mnemonic, bits<16> opcode> + : InstVRIe<opcode, (outs VR128:$V1), + (ins VR128:$V2, imm32zx12:$I3, imm32zx4:$M4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $I3, $M4, $M5", []>; + +class BinaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator, + TypedReg tr1, TypedReg tr2, bits<4> type = 0, bits<4> m4 = 0> + : InstVRRa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $M5", + [(set tr1.op:$V1, (tr1.vt (operator (tr2.vt tr2.op:$V2), + imm32zx12:$M5)))]> { + let M3 = type; + let M4 = m4; } +class BinaryVRRaFloatGeneric<string mnemonic, bits<16> opcode> + : InstVRRa<opcode, (outs VR128:$V1), + (ins VR128:$V2, imm32zx4:$M3, imm32zx4:$M4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $M3, $M4, $M5", []>; + class BinaryVRRb<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> type = 0, bits<4> modifier = 0> @@ -2071,6 +2129,11 @@ multiclass BinaryVRRbSPair<string mnemonic, bits<16> opcode, !add (!and (modifier, 14), 1)>; } +class BinaryVRRbSPairGeneric<string mnemonic, bits<16> opcode> + : InstVRRb<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []>; + // Declare a pair of instructions, one which sets CC and one which doesn't. // The CC-setting form ends with "S" and sets the low bit of M5. // The form that does not set CC has an extra operand to optionally allow @@ -2092,6 +2155,15 @@ multiclass BinaryExtraVRRbSPair<string mnemonic, bits<16> opcode, def S : BinaryVRRb<mnemonic##"s", opcode, operator_cc, tr1, tr2, type, 1>; } +multiclass BinaryExtraVRRbSPairGeneric<string mnemonic, bits<16> opcode> { + def "" : InstVRRb<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []>; + def : InstAlias<mnemonic#"\t$V1, $V2, $V3, $M4", + (!cast<Instruction>(NAME) VR128:$V1, VR128:$V2, VR128:$V3, + imm32zx4:$M4, 0)>; +} + class BinaryVRRc<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> type = 0, bits<4> m5 = 0, bits<4> m6 = 0> @@ -2104,6 +2176,22 @@ class BinaryVRRc<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M6 = m6; } +class BinaryVRRcGeneric<string mnemonic, bits<16> opcode, bits<4> m5 = 0, + bits<4> m6 = 0> + : InstVRRc<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, imm32zx4:$M4), + mnemonic#"\t$V1, $V2, $V3, $M4", []> { + let M5 = m5; + let M6 = m6; +} + +class BinaryVRRcFloatGeneric<string mnemonic, bits<16> opcode, bits<4> m6 = 0> + : InstVRRc<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []> { + let M6 = m6; +} + // Declare a pair of instructions, one which sets CC and one which doesn't. // The CC-setting form ends with "S" and sets the low bit of M5. multiclass BinaryVRRcSPair<string mnemonic, bits<16> opcode, @@ -2118,6 +2206,12 @@ multiclass BinaryVRRcSPair<string mnemonic, bits<16> opcode, m5, !add (!and (modifier, 14), 1)>; } +class BinaryVRRcSPairFloatGeneric<string mnemonic, bits<16> opcode> + : InstVRRc<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5, + imm32zx4:$M6), + mnemonic#"\t$V1, $V2, $V3, $M4, $M5, $M6", []>; + class BinaryVRRf<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr> : InstVRRf<opcode, (outs tr.op:$V1), (ins GR64:$R2, GR64:$R3), @@ -2133,6 +2227,11 @@ class BinaryVRSa<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M4 = type; } +class BinaryVRSaGeneric<string mnemonic, bits<16> opcode> + : InstVRSa<opcode, (outs VR128:$V1), + (ins VR128:$V3, shift12only:$BD2, imm32zx4:$M4), + mnemonic#"\t$V1, $V3, $BD2, $M4", []>; + class BinaryVRSb<string mnemonic, bits<16> opcode, SDPatternOperator operator, bits<5> bytes> : InstVRSb<opcode, (outs VR128:$V1), (ins GR32:$R3, bdaddr12only:$BD2), @@ -2151,6 +2250,11 @@ class BinaryVRSc<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M4 = type; } +class BinaryVRScGeneric<string mnemonic, bits<16> opcode> + : InstVRSc<opcode, (outs GR64:$R1), + (ins VR128:$V3, shift12only:$BD2, imm32zx4: $M4), + mnemonic#"\t$R1, $V3, $BD2, $M4", []>; + class BinaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr, bits<5> bytes> : InstVRX<opcode, (outs VR128:$V1), (ins bdxaddr12only:$XBD2, imm32zx4:$M3), @@ -2332,6 +2436,22 @@ class CompareVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M5 = 0; } +class CompareVRRaGeneric<string mnemonic, bits<16> opcode> + : InstVRRa<opcode, (outs), (ins VR128:$V1, VR128:$V2, imm32zx4:$M3), + mnemonic#"\t$V1, $V2, $M3", []> { + let isCompare = 1; + let M4 = 0; + let M5 = 0; +} + +class CompareVRRaFloatGeneric<string mnemonic, bits<16> opcode> + : InstVRRa<opcode, (outs), + (ins VR64:$V1, VR64:$V2, imm32zx4:$M3, imm32zx4:$M4), + mnemonic#"\t$V1, $V2, $M3, $M4", []> { + let isCompare = 1; + let M5 = 0; +} + class TestRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator, RegisterOperand cls> : InstRXE<opcode, (outs), (ins cls:$R1, bdxaddr12only:$XBD2), @@ -2433,6 +2553,11 @@ class TernaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M3 = type; } +class TernaryVRRaFloatGeneric<string mnemonic, bits<16> opcode> + : InstVRRa<opcode, (outs VR128:$V1), + (ins VR128:$V2, imm32zx4:$M3, imm32zx4:$M4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $M3, $M4, $M5", []>; + class TernaryVRRb<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> type, SDPatternOperator m5mask, bits<4> m5or> @@ -2467,6 +2592,15 @@ multiclass TernaryOptVRRbSPair<string mnemonic, bits<16> opcode, tr2.op:$V3, 0)>; } +multiclass TernaryOptVRRbSPairGeneric<string mnemonic, bits<16> opcode> { + def "" : InstVRRb<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []>; + def : InstAlias<mnemonic#"\t$V1, $V2, $V3, $M4", + (!cast<Instruction>(NAME) VR128:$V1, VR128:$V2, VR128:$V3, + imm32zx4:$M4, 0)>; +} + class TernaryVRRc<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2> : InstVRRc<opcode, (outs tr1.op:$V1), @@ -2491,6 +2625,13 @@ class TernaryVRRd<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M6 = 0; } +class TernaryVRRdGeneric<string mnemonic, bits<16> opcode> + : InstVRRd<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, VR128:$V4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $V3, $V4, $M5", []> { + let M6 = 0; +} + class TernaryVRRe<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> m5 = 0, bits<4> type = 0> : InstVRRe<opcode, (outs tr1.op:$V1), @@ -2503,6 +2644,11 @@ class TernaryVRRe<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M6 = type; } +class TernaryVRReFloatGeneric<string mnemonic, bits<16> opcode> + : InstVRRe<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, VR128:$V4, imm32zx4:$M5, imm32zx4:$M6), + mnemonic#"\t$V1, $V2, $V3, $V4, $M5, $M6", []>; + class TernaryVRSb<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, RegisterOperand cls, bits<4> type> : InstVRSb<opcode, (outs tr1.op:$V1), @@ -2516,6 +2662,14 @@ class TernaryVRSb<string mnemonic, bits<16> opcode, SDPatternOperator operator, let M4 = type; } +class TernaryVRSbGeneric<string mnemonic, bits<16> opcode> + : InstVRSb<opcode, (outs VR128:$V1), + (ins VR128:$V1src, GR64:$R3, shift12only:$BD2, imm32zx4:$M4), + mnemonic#"\t$V1, $R3, $BD2, $M4", []> { + let Constraints = "$V1 = $V1src"; + let DisableEncoding = "$V1src"; +} + class TernaryVRV<string mnemonic, bits<16> opcode, bits<5> bytes, Immediate index> : InstVRV<opcode, (outs VR128:$V1), @@ -2555,6 +2709,15 @@ class QuaternaryVRId<string mnemonic, bits<16> opcode, SDPatternOperator operato let M5 = type; } +class QuaternaryVRIdGeneric<string mnemonic, bits<16> opcode> + : InstVRId<opcode, (outs VR128:$V1), + (ins VR128:$V1src, VR128:$V2, VR128:$V3, + imm32zx8:$I4, imm32zx4:$M5), + mnemonic#"\t$V1, $V2, $V3, $I4, $M5", []> { + let Constraints = "$V1 = $V1src"; + let DisableEncoding = "$V1src"; +} + class QuaternaryVRRd<string mnemonic, bits<16> opcode, SDPatternOperator operator, TypedReg tr1, TypedReg tr2, bits<4> type, SDPatternOperator m6mask, bits<4> m6or> @@ -2590,6 +2753,16 @@ multiclass QuaternaryOptVRRdSPair<string mnemonic, bits<16> opcode, tr2.op:$V3, tr2.op:$V4, 0)>; } +multiclass QuaternaryOptVRRdSPairGeneric<string mnemonic, bits<16> opcode> { + def "" : InstVRRd<opcode, (outs VR128:$V1), + (ins VR128:$V2, VR128:$V3, VR128:$V4, + imm32zx4:$M5, imm32zx4:$M6), + mnemonic#"\t$V1, $V2, $V3, $V4, $M5, $M6", []>; + def : InstAlias<mnemonic#"\t$V1, $V2, $V3, $V4, $M5", + (!cast<Instruction>(NAME) VR128:$V1, VR128:$V2, VR128:$V3, + VR128:$V4, imm32zx4:$M5, 0)>; +} + class LoadAndOpRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator, RegisterOperand cls, AddressingMode mode = bdaddr20only> : InstRSY<opcode, (outs cls:$R1), (ins cls:$R3, mode:$BD2), diff --git a/llvm/lib/Target/SystemZ/SystemZInstrVector.td b/llvm/lib/Target/SystemZ/SystemZInstrVector.td index ca1a12b8e79..71873e62c23 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrVector.td +++ b/llvm/lib/Target/SystemZ/SystemZInstrVector.td @@ -18,12 +18,14 @@ let Predicates = [FeatureVector] in { def VLR64 : UnaryAliasVRR<null_frag, v64db, v64db>; // Load GR from VR element. + def VLGV : BinaryVRScGeneric<"vlgv", 0xE721>; def VLGVB : BinaryVRSc<"vlgvb", 0xE721, null_frag, v128b, 0>; def VLGVH : BinaryVRSc<"vlgvh", 0xE721, null_frag, v128h, 1>; def VLGVF : BinaryVRSc<"vlgvf", 0xE721, null_frag, v128f, 2>; def VLGVG : BinaryVRSc<"vlgvg", 0xE721, z_vector_extract, v128g, 3>; // Load VR element from GR. + def VLVG : TernaryVRSbGeneric<"vlvg", 0xE722>; def VLVGB : TernaryVRSb<"vlvgb", 0xE722, z_vector_insert, v128b, v128b, GR32, 0>; def VLVGH : TernaryVRSb<"vlvgh", 0xE722, z_vector_insert, @@ -60,6 +62,7 @@ let Predicates = [FeatureVector] in { def VGBM : UnaryVRIa<"vgbm", 0xE744, z_byte_mask, v128b, imm32zx16>; // Generate mask. + def VGM : BinaryVRIbGeneric<"vgm", 0xE746>; def VGMB : BinaryVRIb<"vgmb", 0xE746, z_rotate_mask, v128b, 0>; def VGMH : BinaryVRIb<"vgmh", 0xE746, z_rotate_mask, v128h, 1>; def VGMF : BinaryVRIb<"vgmf", 0xE746, z_rotate_mask, v128f, 2>; @@ -85,6 +88,7 @@ let Predicates = [FeatureVector] in { } // Replicate immediate. + def VREPI : UnaryVRIaGeneric<"vrepi", 0xE745, imm32sx16>; def VREPIB : UnaryVRIa<"vrepib", 0xE745, z_replicate, v128b, imm32sx16, 0>; def VREPIH : UnaryVRIa<"vrepih", 0xE745, z_replicate, v128h, imm32sx16, 1>; def VREPIF : UnaryVRIa<"vrepif", 0xE745, z_replicate, v128f, imm32sx16, 2>; @@ -119,6 +123,7 @@ let Predicates = [FeatureVector] in { def VLM : LoadMultipleVRSa<"vlm", 0xE736>; // Load and replicate + def VLREP : UnaryVRXGeneric<"vlrep", 0xE705>; def VLREPB : UnaryVRX<"vlrepb", 0xE705, z_replicate_loadi8, v128b, 1, 0>; def VLREPH : UnaryVRX<"vlreph", 0xE705, z_replicate_loadi16, v128h, 2, 1>; def VLREPF : UnaryVRX<"vlrepf", 0xE705, z_replicate_loadi32, v128f, 4, 2>; @@ -136,6 +141,7 @@ let Predicates = [FeatureVector] in { def VL64 : UnaryAliasVRX<load, v64db, bdxaddr12pair>; // Load logical element and zero. + def VLLEZ : UnaryVRXGeneric<"vllez", 0xE704>; def VLLEZB : UnaryVRX<"vllezb", 0xE704, z_vllezi8, v128b, 1, 0>; def VLLEZH : UnaryVRX<"vllezh", 0xE704, z_vllezi16, v128h, 2, 1>; def VLLEZF : UnaryVRX<"vllezf", 0xE704, z_vllezi32, v128f, 4, 2>; @@ -223,6 +229,7 @@ let Predicates = [FeatureVector] in { let Predicates = [FeatureVector] in { // Merge high. + def VMRH: BinaryVRRcGeneric<"vmrh", 0xE761>; def VMRHB : BinaryVRRc<"vmrhb", 0xE761, z_merge_high, v128b, v128b, 0>; def VMRHH : BinaryVRRc<"vmrhh", 0xE761, z_merge_high, v128h, v128h, 1>; def VMRHF : BinaryVRRc<"vmrhf", 0xE761, z_merge_high, v128f, v128f, 2>; @@ -231,6 +238,7 @@ let Predicates = [FeatureVector] in { def : BinaryRRWithType<VMRHG, VR128, z_merge_high, v2f64>; // Merge low. + def VMRL: BinaryVRRcGeneric<"vmrl", 0xE760>; def VMRLB : BinaryVRRc<"vmrlb", 0xE760, z_merge_low, v128b, v128b, 0>; def VMRLH : BinaryVRRc<"vmrlh", 0xE760, z_merge_low, v128h, v128h, 1>; def VMRLF : BinaryVRRc<"vmrlf", 0xE760, z_merge_low, v128f, v128f, 2>; @@ -245,6 +253,7 @@ let Predicates = [FeatureVector] in { def VPDI : TernaryVRRc<"vpdi", 0xE784, z_permute_dwords, v128g, v128g>; // Replicate. + def VREP: BinaryVRIcGeneric<"vrep", 0xE74D>; def VREPB : BinaryVRIc<"vrepb", 0xE74D, z_splat, v128b, v128b, 0>; def VREPH : BinaryVRIc<"vreph", 0xE74D, z_splat, v128h, v128h, 1>; def VREPF : BinaryVRIc<"vrepf", 0xE74D, z_splat, v128f, v128f, 2>; @@ -264,11 +273,13 @@ let Predicates = [FeatureVector] in { let Predicates = [FeatureVector] in { // Pack + def VPK : BinaryVRRcGeneric<"vpk", 0xE794>; def VPKH : BinaryVRRc<"vpkh", 0xE794, z_pack, v128b, v128h, 1>; def VPKF : BinaryVRRc<"vpkf", 0xE794, z_pack, v128h, v128f, 2>; def VPKG : BinaryVRRc<"vpkg", 0xE794, z_pack, v128f, v128g, 3>; // Pack saturate. + def VPKS : BinaryVRRbSPairGeneric<"vpks", 0xE797>; defm VPKSH : BinaryVRRbSPair<"vpksh", 0xE797, int_s390_vpksh, z_packs_cc, v128b, v128h, 1>; defm VPKSF : BinaryVRRbSPair<"vpksf", 0xE797, int_s390_vpksf, z_packs_cc, @@ -277,6 +288,7 @@ let Predicates = [FeatureVector] in { v128f, v128g, 3>; // Pack saturate logical. + def VPKLS : BinaryVRRbSPairGeneric<"vpkls", 0xE795>; defm VPKLSH : BinaryVRRbSPair<"vpklsh", 0xE795, int_s390_vpklsh, z_packls_cc, v128b, v128h, 1>; defm VPKLSF : BinaryVRRbSPair<"vpklsf", 0xE795, int_s390_vpklsf, z_packls_cc, @@ -285,6 +297,7 @@ let Predicates = [FeatureVector] in { v128f, v128g, 3>; // Sign-extend to doubleword. + def VSEG : UnaryVRRaGeneric<"vseg", 0xE75F>; def VSEGB : UnaryVRRa<"vsegb", 0xE75F, z_vsei8, v128g, v128g, 0>; def VSEGH : UnaryVRRa<"vsegh", 0xE75F, z_vsei16, v128g, v128g, 1>; def VSEGF : UnaryVRRa<"vsegf", 0xE75F, z_vsei32, v128g, v128g, 2>; @@ -293,21 +306,25 @@ let Predicates = [FeatureVector] in { def : Pat<(z_vsei32_by_parts (v4i32 VR128:$src)), (VSEGF VR128:$src)>; // Unpack high. + def VUPH : UnaryVRRaGeneric<"vuph", 0xE7D7>; def VUPHB : UnaryVRRa<"vuphb", 0xE7D7, z_unpack_high, v128h, v128b, 0>; def VUPHH : UnaryVRRa<"vuphh", 0xE7D7, z_unpack_high, v128f, v128h, 1>; def VUPHF : UnaryVRRa<"vuphf", 0xE7D7, z_unpack_high, v128g, v128f, 2>; // Unpack logical high. + def VUPLH : UnaryVRRaGeneric<"vuplh", 0xE7D5>; def VUPLHB : UnaryVRRa<"vuplhb", 0xE7D5, z_unpackl_high, v128h, v128b, 0>; def VUPLHH : UnaryVRRa<"vuplhh", 0xE7D5, z_unpackl_high, v128f, v128h, 1>; def VUPLHF : UnaryVRRa<"vuplhf", 0xE7D5, z_unpackl_high, v128g, v128f, 2>; // Unpack low. + def VUPL : UnaryVRRaGeneric<"vupl", 0xE7D6>; def VUPLB : UnaryVRRa<"vuplb", 0xE7D6, z_unpack_low, v128h, v128b, 0>; def VUPLHW : UnaryVRRa<"vuplhw", 0xE7D6, z_unpack_low, v128f, v128h, 1>; def VUPLF : UnaryVRRa<"vuplf", 0xE7D6, z_unpack_low, v128g, v128f, 2>; // Unpack logical low. + def VUPLL : UnaryVRRaGeneric<"vupll", 0xE7D4>; def VUPLLB : UnaryVRRa<"vupllb", 0xE7D4, z_unpackl_low, v128h, v128b, 0>; def VUPLLH : UnaryVRRa<"vupllh", 0xE7D4, z_unpackl_low, v128f, v128h, 1>; def VUPLLF : UnaryVRRa<"vupllf", 0xE7D4, z_unpackl_low, v128g, v128f, 2>; @@ -343,6 +360,7 @@ defm : GenericVectorOps<v2f64, v2i64>; let Predicates = [FeatureVector] in { // Add. + def VA : BinaryVRRcGeneric<"va", 0xE7F3>; def VAB : BinaryVRRc<"vab", 0xE7F3, add, v128b, v128b, 0>; def VAH : BinaryVRRc<"vah", 0xE7F3, add, v128h, v128h, 1>; def VAF : BinaryVRRc<"vaf", 0xE7F3, add, v128f, v128f, 2>; @@ -350,6 +368,7 @@ let Predicates = [FeatureVector] in { def VAQ : BinaryVRRc<"vaq", 0xE7F3, int_s390_vaq, v128q, v128q, 4>; // Add compute carry. + def VACC : BinaryVRRcGeneric<"vacc", 0xE7F1>; def VACCB : BinaryVRRc<"vaccb", 0xE7F1, int_s390_vaccb, v128b, v128b, 0>; def VACCH : BinaryVRRc<"vacch", 0xE7F1, int_s390_vacch, v128h, v128h, 1>; def VACCF : BinaryVRRc<"vaccf", 0xE7F1, int_s390_vaccf, v128f, v128f, 2>; @@ -357,9 +376,11 @@ let Predicates = [FeatureVector] in { def VACCQ : BinaryVRRc<"vaccq", 0xE7F1, int_s390_vaccq, v128q, v128q, 4>; // Add with carry. + def VAC : TernaryVRRdGeneric<"vac", 0xE7BB>; def VACQ : TernaryVRRd<"vacq", 0xE7BB, int_s390_vacq, v128q, v128q, 4>; // Add with carry compute carry. + def VACCC : TernaryVRRdGeneric<"vaccc", 0xE7B9>; def VACCCQ : TernaryVRRd<"vacccq", 0xE7B9, int_s390_vacccq, v128q, v128q, 4>; // And. @@ -369,12 +390,14 @@ let Predicates = [FeatureVector] in { def VNC : BinaryVRRc<"vnc", 0xE769, null_frag, v128any, v128any>; // Average. + def VAVG : BinaryVRRcGeneric<"vavg", 0xE7F2>; def VAVGB : BinaryVRRc<"vavgb", 0xE7F2, int_s390_vavgb, v128b, v128b, 0>; def VAVGH : BinaryVRRc<"vavgh", 0xE7F2, int_s390_vavgh, v128h, v128h, 1>; def VAVGF : BinaryVRRc<"vavgf", 0xE7F2, int_s390_vavgf, v128f, v128f, 2>; def VAVGG : BinaryVRRc<"vavgg", 0xE7F2, int_s390_vavgg, v128g, v128g, 3>; // Average logical. + def VAVGL : BinaryVRRcGeneric<"vavgl", 0xE7F0>; def VAVGLB : BinaryVRRc<"vavglb", 0xE7F0, int_s390_vavglb, v128b, v128b, 0>; def VAVGLH : BinaryVRRc<"vavglh", 0xE7F0, int_s390_vavglh, v128h, v128h, 1>; def VAVGLF : BinaryVRRc<"vavglf", 0xE7F0, int_s390_vavglf, v128f, v128f, 2>; @@ -384,12 +407,14 @@ let Predicates = [FeatureVector] in { def VCKSM : BinaryVRRc<"vcksm", 0xE766, int_s390_vcksm, v128f, v128f>; // Count leading zeros. + def VCLZ : UnaryVRRaGeneric<"vclz", 0xE753>; def VCLZB : UnaryVRRa<"vclzb", 0xE753, ctlz, v128b, v128b, 0>; def VCLZH : UnaryVRRa<"vclzh", 0xE753, ctlz, v128h, v128h, 1>; def VCLZF : UnaryVRRa<"vclzf", 0xE753, ctlz, v128f, v128f, 2>; def VCLZG : UnaryVRRa<"vclzg", 0xE753, ctlz, v128g, v128g, 3>; // Count trailing zeros. + def VCLT : UnaryVRRaGeneric<"vctz", 0xE752>; def VCTZB : UnaryVRRa<"vctzb", 0xE752, cttz, v128b, v128b, 0>; def VCTZH : UnaryVRRa<"vctzh", 0xE752, cttz, v128h, v128h, 1>; def VCTZF : UnaryVRRa<"vctzf", 0xE752, cttz, v128f, v128f, 2>; @@ -399,134 +424,158 @@ let Predicates = [FeatureVector] in { def VX : BinaryVRRc<"vx", 0xE76D, null_frag, v128any, v128any>; // Galois field multiply sum. + def VGFM : BinaryVRRcGeneric<"vgfm", 0xE7B4>; def VGFMB : BinaryVRRc<"vgfmb", 0xE7B4, int_s390_vgfmb, v128h, v128b, 0>; def VGFMH : BinaryVRRc<"vgfmh", 0xE7B4, int_s390_vgfmh, v128f, v128h, 1>; def VGFMF : BinaryVRRc<"vgfmf", 0xE7B4, int_s390_vgfmf, v128g, v128f, 2>; def VGFMG : BinaryVRRc<"vgfmg", 0xE7B4, int_s390_vgfmg, v128q, v128g, 3>; // Galois field multiply sum and accumulate. + def VGFMA : TernaryVRRdGeneric<"vgfma", 0xE7BC>; def VGFMAB : TernaryVRRd<"vgfmab", 0xE7BC, int_s390_vgfmab, v128h, v128b, 0>; def VGFMAH : TernaryVRRd<"vgfmah", 0xE7BC, int_s390_vgfmah, v128f, v128h, 1>; def VGFMAF : TernaryVRRd<"vgfmaf", 0xE7BC, int_s390_vgfmaf, v128g, v128f, 2>; def VGFMAG : TernaryVRRd<"vgfmag", 0xE7BC, int_s390_vgfmag, v128q, v128g, 3>; // Load complement. + def VLC : UnaryVRRaGeneric<"vlc", 0xE7DE>; def VLCB : UnaryVRRa<"vlcb", 0xE7DE, z_vneg, v128b, v128b, 0>; def VLCH : UnaryVRRa<"vlch", 0xE7DE, z_vneg, v128h, v128h, 1>; def VLCF : UnaryVRRa<"vlcf", 0xE7DE, z_vneg, v128f, v128f, 2>; def VLCG : UnaryVRRa<"vlcg", 0xE7DE, z_vneg, v128g, v128g, 3>; // Load positive. + def VLP : UnaryVRRaGeneric<"vlp", 0xE7DF>; def VLPB : UnaryVRRa<"vlpb", 0xE7DF, z_viabs8, v128b, v128b, 0>; def VLPH : UnaryVRRa<"vlph", 0xE7DF, z_viabs16, v128h, v128h, 1>; def VLPF : UnaryVRRa<"vlpf", 0xE7DF, z_viabs32, v128f, v128f, 2>; def VLPG : UnaryVRRa<"vlpg", 0xE7DF, z_viabs64, v128g, v128g, 3>; // Maximum. + def VMX : BinaryVRRcGeneric<"vmx", 0xE7FF>; def VMXB : BinaryVRRc<"vmxb", 0xE7FF, null_frag, v128b, v128b, 0>; def VMXH : BinaryVRRc<"vmxh", 0xE7FF, null_frag, v128h, v128h, 1>; def VMXF : BinaryVRRc<"vmxf", 0xE7FF, null_frag, v128f, v128f, 2>; def VMXG : BinaryVRRc<"vmxg", 0xE7FF, null_frag, v128g, v128g, 3>; // Maximum logical. + def VMXL : BinaryVRRcGeneric<"vmxl", 0xE7FD>; def VMXLB : BinaryVRRc<"vmxlb", 0xE7FD, null_frag, v128b, v128b, 0>; def VMXLH : BinaryVRRc<"vmxlh", 0xE7FD, null_frag, v128h, v128h, 1>; def VMXLF : BinaryVRRc<"vmxlf", 0xE7FD, null_frag, v128f, v128f, 2>; def VMXLG : BinaryVRRc<"vmxlg", 0xE7FD, null_frag, v128g, v128g, 3>; // Minimum. + def VMN : BinaryVRRcGeneric<"vmn", 0xE7FE>; def VMNB : BinaryVRRc<"vmnb", 0xE7FE, null_frag, v128b, v128b, 0>; def VMNH : BinaryVRRc<"vmnh", 0xE7FE, null_frag, v128h, v128h, 1>; def VMNF : BinaryVRRc<"vmnf", 0xE7FE, null_frag, v128f, v128f, 2>; def VMNG : BinaryVRRc<"vmng", 0xE7FE, null_frag, v128g, v128g, 3>; // Minimum logical. + def VMNL : BinaryVRRcGeneric<"vmnl", 0xE7FC>; def VMNLB : BinaryVRRc<"vmnlb", 0xE7FC, null_frag, v128b, v128b, 0>; def VMNLH : BinaryVRRc<"vmnlh", 0xE7FC, null_frag, v128h, v128h, 1>; def VMNLF : BinaryVRRc<"vmnlf", 0xE7FC, null_frag, v128f, v128f, 2>; def VMNLG : BinaryVRRc<"vmnlg", 0xE7FC, null_frag, v128g, v128g, 3>; // Multiply and add low. + def VMAL : TernaryVRRdGeneric<"vmal", 0xE7AA>; def VMALB : TernaryVRRd<"vmalb", 0xE7AA, z_muladd, v128b, v128b, 0>; def VMALHW : TernaryVRRd<"vmalhw", 0xE7AA, z_muladd, v128h, v128h, 1>; def VMALF : TernaryVRRd<"vmalf", 0xE7AA, z_muladd, v128f, v128f, 2>; // Multiply and add high. + def VMAH : TernaryVRRdGeneric<"vmah", 0xE7AB>; def VMAHB : TernaryVRRd<"vmahb", 0xE7AB, int_s390_vmahb, v128b, v128b, 0>; def VMAHH : TernaryVRRd<"vmahh", 0xE7AB, int_s390_vmahh, v128h, v128h, 1>; def VMAHF : TernaryVRRd<"vmahf", 0xE7AB, int_s390_vmahf, v128f, v128f, 2>; // Multiply and add logical high. + def VMALH : TernaryVRRdGeneric<"vmalh", 0xE7A9>; def VMALHB : TernaryVRRd<"vmalhb", 0xE7A9, int_s390_vmalhb, v128b, v128b, 0>; def VMALHH : TernaryVRRd<"vmalhh", 0xE7A9, int_s390_vmalhh, v128h, v128h, 1>; def VMALHF : TernaryVRRd<"vmalhf", 0xE7A9, int_s390_vmalhf, v128f, v128f, 2>; // Multiply and add even. + def VMAE : TernaryVRRdGeneric<"vmae", 0xE7AE>; def VMAEB : TernaryVRRd<"vmaeb", 0xE7AE, int_s390_vmaeb, v128h, v128b, 0>; def VMAEH : TernaryVRRd<"vmaeh", 0xE7AE, int_s390_vmaeh, v128f, v128h, 1>; def VMAEF : TernaryVRRd<"vmaef", 0xE7AE, int_s390_vmaef, v128g, v128f, 2>; // Multiply and add logical even. + def VMALE : TernaryVRRdGeneric<"vmale", 0xE7AC>; def VMALEB : TernaryVRRd<"vmaleb", 0xE7AC, int_s390_vmaleb, v128h, v128b, 0>; def VMALEH : TernaryVRRd<"vmaleh", 0xE7AC, int_s390_vmaleh, v128f, v128h, 1>; def VMALEF : TernaryVRRd<"vmalef", 0xE7AC, int_s390_vmalef, v128g, v128f, 2>; // Multiply and add odd. + def VMAO : TernaryVRRdGeneric<"vmao", 0xE7AF>; def VMAOB : TernaryVRRd<"vmaob", 0xE7AF, int_s390_vmaob, v128h, v128b, 0>; def VMAOH : TernaryVRRd<"vmaoh", 0xE7AF, int_s390_vmaoh, v128f, v128h, 1>; def VMAOF : TernaryVRRd<"vmaof", 0xE7AF, int_s390_vmaof, v128g, v128f, 2>; // Multiply and add logical odd. + def VMALO : TernaryVRRdGeneric<"vmalo", 0xE7AD>; def VMALOB : TernaryVRRd<"vmalob", 0xE7AD, int_s390_vmalob, v128h, v128b, 0>; def VMALOH : TernaryVRRd<"vmaloh", 0xE7AD, int_s390_vmaloh, v128f, v128h, 1>; def VMALOF : TernaryVRRd<"vmalof", 0xE7AD, int_s390_vmalof, v128g, v128f, 2>; // Multiply high. + def VMH : BinaryVRRcGeneric<"vmh", 0xE7A3>; def VMHB : BinaryVRRc<"vmhb", 0xE7A3, int_s390_vmhb, v128b, v128b, 0>; def VMHH : BinaryVRRc<"vmhh", 0xE7A3, int_s390_vmhh, v128h, v128h, 1>; def VMHF : BinaryVRRc<"vmhf", 0xE7A3, int_s390_vmhf, v128f, v128f, 2>; // Multiply logical high. + def VMLH : BinaryVRRcGeneric<"vmlh", 0xE7A1>; def VMLHB : BinaryVRRc<"vmlhb", 0xE7A1, int_s390_vmlhb, v128b, v128b, 0>; def VMLHH : BinaryVRRc<"vmlhh", 0xE7A1, int_s390_vmlhh, v128h, v128h, 1>; def VMLHF : BinaryVRRc<"vmlhf", 0xE7A1, int_s390_vmlhf, v128f, v128f, 2>; // Multiply low. + def VML : BinaryVRRcGeneric<"vml", 0xE7A2>; def VMLB : BinaryVRRc<"vmlb", 0xE7A2, mul, v128b, v128b, 0>; def VMLHW : BinaryVRRc<"vmlhw", 0xE7A2, mul, v128h, v128h, 1>; def VMLF : BinaryVRRc<"vmlf", 0xE7A2, mul, v128f, v128f, 2>; // Multiply even. + def VME : BinaryVRRcGeneric<"vme", 0xE7A6>; def VMEB : BinaryVRRc<"vmeb", 0xE7A6, int_s390_vmeb, v128h, v128b, 0>; def VMEH : BinaryVRRc<"vmeh", 0xE7A6, int_s390_vmeh, v128f, v128h, 1>; def VMEF : BinaryVRRc<"vmef", 0xE7A6, int_s390_vmef, v128g, v128f, 2>; // Multiply logical even. + def VMLE : BinaryVRRcGeneric<"vmle", 0xE7A4>; def VMLEB : BinaryVRRc<"vmleb", 0xE7A4, int_s390_vmleb, v128h, v128b, 0>; def VMLEH : BinaryVRRc<"vmleh", 0xE7A4, int_s390_vmleh, v128f, v128h, 1>; def VMLEF : BinaryVRRc<"vmlef", 0xE7A4, int_s390_vmlef, v128g, v128f, 2>; // Multiply odd. + def VMO : BinaryVRRcGeneric<"vmo", 0xE7A7>; def VMOB : BinaryVRRc<"vmob", 0xE7A7, int_s390_vmob, v128h, v128b, 0>; def VMOH : BinaryVRRc<"vmoh", 0xE7A7, int_s390_vmoh, v128f, v128h, 1>; def VMOF : BinaryVRRc<"vmof", 0xE7A7, int_s390_vmof, v128g, v128f, 2>; // Multiply logical odd. + def VMLO : BinaryVRRcGeneric<"vmlo", 0xE7A5>; def VMLOB : BinaryVRRc<"vmlob", 0xE7A5, int_s390_vmlob, v128h, v128b, 0>; def VMLOH : BinaryVRRc<"vmloh", 0xE7A5, int_s390_vmloh, v128f, v128h, 1>; def VMLOF : BinaryVRRc<"vmlof", 0xE7A5, int_s390_vmlof, v128g, v128f, 2>; // Nor. def VNO : BinaryVRRc<"vno", 0xE76B, null_frag, v128any, v128any>; + def : InstAlias<"vnot\t$V1, $V2", (VNO VR128:$V1, VR128:$V2, VR128:$V2), 0>; // Or. def VO : BinaryVRRc<"vo", 0xE76A, null_frag, v128any, v128any>; // Population count. - def VPOPCT : BinaryVRRa<"vpopct", 0xE750>; + def VPOPCT : UnaryVRRaGeneric<"vpopct", 0xE750>; def : Pat<(v16i8 (z_popcnt VR128:$x)), (VPOPCT VR128:$x, 0)>; // Element rotate left logical (with vector shift amount). + def VERLLV : BinaryVRRcGeneric<"verllv", 0xE773>; def VERLLVB : BinaryVRRc<"verllvb", 0xE773, int_s390_verllvb, v128b, v128b, 0>; def VERLLVH : BinaryVRRc<"verllvh", 0xE773, int_s390_verllvh, @@ -537,48 +586,56 @@ let Predicates = [FeatureVector] in { v128g, v128g, 3>; // Element rotate left logical (with scalar shift amount). + def VERLL : BinaryVRSaGeneric<"verll", 0xE733>; def VERLLB : BinaryVRSa<"verllb", 0xE733, int_s390_verllb, v128b, v128b, 0>; def VERLLH : BinaryVRSa<"verllh", 0xE733, int_s390_verllh, v128h, v128h, 1>; def VERLLF : BinaryVRSa<"verllf", 0xE733, int_s390_verllf, v128f, v128f, 2>; def VERLLG : BinaryVRSa<"verllg", 0xE733, int_s390_verllg, v128g, v128g, 3>; // Element rotate and insert under mask. + def VERIM : QuaternaryVRIdGeneric<"verim", 0xE772>; def VERIMB : QuaternaryVRId<"verimb", 0xE772, int_s390_verimb, v128b, v128b, 0>; def VERIMH : QuaternaryVRId<"verimh", 0xE772, int_s390_verimh, v128h, v128h, 1>; def VERIMF : QuaternaryVRId<"verimf", 0xE772, int_s390_verimf, v128f, v128f, 2>; def VERIMG : QuaternaryVRId<"verimg", 0xE772, int_s390_verimg, v128g, v128g, 3>; // Element shift left (with vector shift amount). + def VESLV : BinaryVRRcGeneric<"veslv", 0xE770>; def VESLVB : BinaryVRRc<"veslvb", 0xE770, z_vshl, v128b, v128b, 0>; def VESLVH : BinaryVRRc<"veslvh", 0xE770, z_vshl, v128h, v128h, 1>; def VESLVF : BinaryVRRc<"veslvf", 0xE770, z_vshl, v128f, v128f, 2>; def VESLVG : BinaryVRRc<"veslvg", 0xE770, z_vshl, v128g, v128g, 3>; // Element shift left (with scalar shift amount). + def VESL : BinaryVRSaGeneric<"vesl", 0xE730>; def VESLB : BinaryVRSa<"veslb", 0xE730, z_vshl_by_scalar, v128b, v128b, 0>; def VESLH : BinaryVRSa<"veslh", 0xE730, z_vshl_by_scalar, v128h, v128h, 1>; def VESLF : BinaryVRSa<"veslf", 0xE730, z_vshl_by_scalar, v128f, v128f, 2>; def VESLG : BinaryVRSa<"veslg", 0xE730, z_vshl_by_scalar, v128g, v128g, 3>; // Element shift right arithmetic (with vector shift amount). + def VESRAV : BinaryVRRcGeneric<"vesrav", 0xE77A>; def VESRAVB : BinaryVRRc<"vesravb", 0xE77A, z_vsra, v128b, v128b, 0>; def VESRAVH : BinaryVRRc<"vesravh", 0xE77A, z_vsra, v128h, v128h, 1>; def VESRAVF : BinaryVRRc<"vesravf", 0xE77A, z_vsra, v128f, v128f, 2>; def VESRAVG : BinaryVRRc<"vesravg", 0xE77A, z_vsra, v128g, v128g, 3>; // Element shift right arithmetic (with scalar shift amount). + def VESRA : BinaryVRSaGeneric<"vesra", 0xE73A>; def VESRAB : BinaryVRSa<"vesrab", 0xE73A, z_vsra_by_scalar, v128b, v128b, 0>; def VESRAH : BinaryVRSa<"vesrah", 0xE73A, z_vsra_by_scalar, v128h, v128h, 1>; def VESRAF : BinaryVRSa<"vesraf", 0xE73A, z_vsra_by_scalar, v128f, v128f, 2>; def VESRAG : BinaryVRSa<"vesrag", 0xE73A, z_vsra_by_scalar, v128g, v128g, 3>; // Element shift right logical (with vector shift amount). + def VESRLV : BinaryVRRcGeneric<"vesrlv", 0xE778>; def VESRLVB : BinaryVRRc<"vesrlvb", 0xE778, z_vsrl, v128b, v128b, 0>; def VESRLVH : BinaryVRRc<"vesrlvh", 0xE778, z_vsrl, v128h, v128h, 1>; def VESRLVF : BinaryVRRc<"vesrlvf", 0xE778, z_vsrl, v128f, v128f, 2>; def VESRLVG : BinaryVRRc<"vesrlvg", 0xE778, z_vsrl, v128g, v128g, 3>; // Element shift right logical (with scalar shift amount). + def VESRL : BinaryVRSaGeneric<"vesrl", 0xE738>; def VESRLB : BinaryVRSa<"vesrlb", 0xE738, z_vsrl_by_scalar, v128b, v128b, 0>; def VESRLH : BinaryVRSa<"vesrlh", 0xE738, z_vsrl_by_scalar, v128h, v128h, 1>; def VESRLF : BinaryVRSa<"vesrlf", 0xE738, z_vsrl_by_scalar, v128f, v128f, 2>; @@ -608,6 +665,7 @@ let Predicates = [FeatureVector] in { def VSRLB : BinaryVRRc<"vsrlb", 0xE77D, int_s390_vsrlb, v128b, v128b>; // Subtract. + def VS : BinaryVRRcGeneric<"vs", 0xE7F7>; def VSB : BinaryVRRc<"vsb", 0xE7F7, sub, v128b, v128b, 0>; def VSH : BinaryVRRc<"vsh", 0xE7F7, sub, v128h, v128h, 1>; def VSF : BinaryVRRc<"vsf", 0xE7F7, sub, v128f, v128f, 2>; @@ -615,6 +673,7 @@ let Predicates = [FeatureVector] in { def VSQ : BinaryVRRc<"vsq", 0xE7F7, int_s390_vsq, v128q, v128q, 4>; // Subtract compute borrow indication. + def VSCBI : BinaryVRRcGeneric<"vscbi", 0xE7F5>; def VSCBIB : BinaryVRRc<"vscbib", 0xE7F5, int_s390_vscbib, v128b, v128b, 0>; def VSCBIH : BinaryVRRc<"vscbih", 0xE7F5, int_s390_vscbih, v128h, v128h, 1>; def VSCBIF : BinaryVRRc<"vscbif", 0xE7F5, int_s390_vscbif, v128f, v128f, 2>; @@ -622,21 +681,26 @@ let Predicates = [FeatureVector] in { def VSCBIQ : BinaryVRRc<"vscbiq", 0xE7F5, int_s390_vscbiq, v128q, v128q, 4>; // Subtract with borrow indication. + def VSBI : TernaryVRRdGeneric<"vsbi", 0xE7BF>; def VSBIQ : TernaryVRRd<"vsbiq", 0xE7BF, int_s390_vsbiq, v128q, v128q, 4>; // Subtract with borrow compute borrow indication. + def VSBCBI : TernaryVRRdGeneric<"vsbcbi", 0xE7BD>; def VSBCBIQ : TernaryVRRd<"vsbcbiq", 0xE7BD, int_s390_vsbcbiq, v128q, v128q, 4>; // Sum across doubleword. + def VSUMG : BinaryVRRcGeneric<"vsumg", 0xE765>; def VSUMGH : BinaryVRRc<"vsumgh", 0xE765, z_vsum, v128g, v128h, 1>; def VSUMGF : BinaryVRRc<"vsumgf", 0xE765, z_vsum, v128g, v128f, 2>; // Sum across quadword. + def VSUMQ : BinaryVRRcGeneric<"vsumq", 0xE767>; def VSUMQF : BinaryVRRc<"vsumqf", 0xE767, z_vsum, v128q, v128f, 2>; def VSUMQG : BinaryVRRc<"vsumqg", 0xE767, z_vsum, v128q, v128g, 3>; // Sum across word. + def VSUM : BinaryVRRcGeneric<"vsum", 0xE764>; def VSUMB : BinaryVRRc<"vsumb", 0xE764, z_vsum, v128f, v128b, 0>; def VSUMH : BinaryVRRc<"vsumh", 0xE764, z_vsum, v128f, v128h, 1>; } @@ -737,6 +801,7 @@ defm : IntegerMinMaxVectorOps<v2i64, z_vicmphl, VMNLG, VMXLG>; let Predicates = [FeatureVector] in { // Element compare. let Defs = [CC] in { + def VEC : CompareVRRaGeneric<"vec", 0xE7DB>; def VECB : CompareVRRa<"vecb", 0xE7DB, null_frag, v128b, 0>; def VECH : CompareVRRa<"vech", 0xE7DB, null_frag, v128h, 1>; def VECF : CompareVRRa<"vecf", 0xE7DB, null_frag, v128f, 2>; @@ -745,6 +810,7 @@ let Predicates = [FeatureVector] in { // Element compare logical. let Defs = [CC] in { + def VECL : CompareVRRaGeneric<"vecl", 0xE7D9>; def VECLB : CompareVRRa<"veclb", 0xE7D9, null_frag, v128b, 0>; def VECLH : CompareVRRa<"veclh", 0xE7D9, null_frag, v128h, 1>; def VECLF : CompareVRRa<"veclf", 0xE7D9, null_frag, v128f, 2>; @@ -752,6 +818,7 @@ let Predicates = [FeatureVector] in { } // Compare equal. + def VCEQ : BinaryVRRbSPairGeneric<"vceq", 0xE7F8>; defm VCEQB : BinaryVRRbSPair<"vceqb", 0xE7F8, z_vicmpe, z_vicmpes, v128b, v128b, 0>; defm VCEQH : BinaryVRRbSPair<"vceqh", 0xE7F8, z_vicmpe, z_vicmpes, @@ -762,6 +829,7 @@ let Predicates = [FeatureVector] in { v128g, v128g, 3>; // Compare high. + def VCH : BinaryVRRbSPairGeneric<"vch", 0xE7FB>; defm VCHB : BinaryVRRbSPair<"vchb", 0xE7FB, z_vicmph, z_vicmphs, v128b, v128b, 0>; defm VCHH : BinaryVRRbSPair<"vchh", 0xE7FB, z_vicmph, z_vicmphs, @@ -772,6 +840,7 @@ let Predicates = [FeatureVector] in { v128g, v128g, 3>; // Compare high logical. + def VCHL : BinaryVRRbSPairGeneric<"vchl", 0xE7F9>; defm VCHLB : BinaryVRRbSPair<"vchlb", 0xE7F9, z_vicmphl, z_vicmphls, v128b, v128b, 0>; defm VCHLH : BinaryVRRbSPair<"vchlh", 0xE7F9, z_vicmphl, z_vicmphls, @@ -803,64 +872,81 @@ multiclass VectorRounding<Instruction insn, TypedReg tr> { let Predicates = [FeatureVector] in { // Add. + def VFA : BinaryVRRcFloatGeneric<"vfa", 0xE7E3>; def VFADB : BinaryVRRc<"vfadb", 0xE7E3, fadd, v128db, v128db, 3, 0>; def WFADB : BinaryVRRc<"wfadb", 0xE7E3, fadd, v64db, v64db, 3, 8>; // Convert from fixed 64-bit. + def VCDG : TernaryVRRaFloatGeneric<"vcdg", 0xE7C3>; def VCDGB : TernaryVRRa<"vcdgb", 0xE7C3, null_frag, v128db, v128g, 3, 0>; def WCDGB : TernaryVRRa<"wcdgb", 0xE7C3, null_frag, v64db, v64g, 3, 8>; def : FPConversion<VCDGB, sint_to_fp, v128db, v128g, 0, 0>; // Convert from logical 64-bit. + def VCDLG : TernaryVRRaFloatGeneric<"vcdlg", 0xE7C1>; def VCDLGB : TernaryVRRa<"vcdlgb", 0xE7C1, null_frag, v128db, v128g, 3, 0>; def WCDLGB : TernaryVRRa<"wcdlgb", 0xE7C1, null_frag, v64db, v64g, 3, 8>; def : FPConversion<VCDLGB, uint_to_fp, v128db, v128g, 0, 0>; // Convert to fixed 64-bit. + def VCGD : TernaryVRRaFloatGeneric<"vcgd", 0xE7C2>; def VCGDB : TernaryVRRa<"vcgdb", 0xE7C2, null_frag, v128g, v128db, 3, 0>; def WCGDB : TernaryVRRa<"wcgdb", 0xE7C2, null_frag, v64g, v64db, 3, 8>; // Rounding mode should agree with SystemZInstrFP.td. def : FPConversion<VCGDB, fp_to_sint, v128g, v128db, 0, 5>; // Convert to logical 64-bit. + def VCLGD : TernaryVRRaFloatGeneric<"vclgd", 0xE7C0>; def VCLGDB : TernaryVRRa<"vclgdb", 0xE7C0, null_frag, v128g, v128db, 3, 0>; def WCLGDB : TernaryVRRa<"wclgdb", 0xE7C0, null_frag, v64g, v64db, 3, 8>; // Rounding mode should agree with SystemZInstrFP.td. def : FPConversion<VCLGDB, fp_to_uint, v128g, v128db, 0, 5>; // Divide. + def VFD : BinaryVRRcFloatGeneric<"vfd", 0xE7E5>; def VFDDB : BinaryVRRc<"vfddb", 0xE7E5, fdiv, v128db, v128db, 3, 0>; def WFDDB : BinaryVRRc<"wfddb", 0xE7E5, fdiv, v64db, v64db, 3, 8>; // Load FP integer. + def VFI : TernaryVRRaFloatGeneric<"vfi", 0xE7C7>; def VFIDB : TernaryVRRa<"vfidb", 0xE7C7, int_s390_vfidb, v128db, v128db, 3, 0>; def WFIDB : TernaryVRRa<"wfidb", 0xE7C7, null_frag, v64db, v64db, 3, 8>; defm : VectorRounding<VFIDB, v128db>; defm : VectorRounding<WFIDB, v64db>; // Load lengthened. + def VLDE : UnaryVRRaFloatGeneric<"vlde", 0xE7C4>; def VLDEB : UnaryVRRa<"vldeb", 0xE7C4, z_vextend, v128db, v128eb, 2, 0>; def WLDEB : UnaryVRRa<"wldeb", 0xE7C4, fpextend, v64db, v32eb, 2, 8>; // Load rounded, + def VLED : TernaryVRRaFloatGeneric<"vled", 0xE7C5>; def VLEDB : TernaryVRRa<"vledb", 0xE7C5, null_frag, v128eb, v128db, 3, 0>; def WLEDB : TernaryVRRa<"wledb", 0xE7C5, null_frag, v32eb, v64db, 3, 8>; def : Pat<(v4f32 (z_vround (v2f64 VR128:$src))), (VLEDB VR128:$src, 0, 0)>; def : FPConversion<WLEDB, fpround, v32eb, v64db, 0, 0>; // Multiply. + def VFM : BinaryVRRcFloatGeneric<"vfm", 0xE7E7>; def VFMDB : BinaryVRRc<"vfmdb", 0xE7E7, fmul, v128db, v128db, 3, 0>; def WFMDB : BinaryVRRc<"wfmdb", 0xE7E7, fmul, v64db, v64db, 3, 8>; // Multiply and add. + def VFMA : TernaryVRReFloatGeneric<"vfma", 0xE78F>; def VFMADB : TernaryVRRe<"vfmadb", 0xE78F, fma, v128db, v128db, 0, 3>; def WFMADB : TernaryVRRe<"wfmadb", 0xE78F, fma, v64db, v64db, 8, 3>; // Multiply and subtract. + def VFMS : TernaryVRReFloatGeneric<"vfms", 0xE78E>; def VFMSDB : TernaryVRRe<"vfmsdb", 0xE78E, fms, v128db, v128db, 0, 3>; def WFMSDB : TernaryVRRe<"wfmsdb", 0xE78E, fms, v64db, v64db, 8, 3>; - // Load complement, + // Perform sign operation. + def VFPSO : BinaryVRRaFloatGeneric<"vfpso", 0xE7CC>; + def VFPSODB : BinaryVRRa<"vfpsodb", 0xE7CC, null_frag, v128db, v128db, 3, 0>; + def WFPSODB : BinaryVRRa<"wfpsodb", 0xE7CC, null_frag, v64db, v64db, 3, 8>; + + // Load complement. def VFLCDB : UnaryVRRa<"vflcdb", 0xE7CC, fneg, v128db, v128db, 3, 0, 0>; def WFLCDB : UnaryVRRa<"wflcdb", 0xE7CC, fneg, v64db, v64db, 3, 8, 0>; @@ -873,15 +959,18 @@ let Predicates = [FeatureVector] in { def WFLPDB : UnaryVRRa<"wflpdb", 0xE7CC, fabs, v64db, v64db, 3, 8, 2>; // Square root. + def VFSQ : UnaryVRRaFloatGeneric<"vfsq", 0xE7CE>; def VFSQDB : UnaryVRRa<"vfsqdb", 0xE7CE, fsqrt, v128db, v128db, 3, 0>; def WFSQDB : UnaryVRRa<"wfsqdb", 0xE7CE, fsqrt, v64db, v64db, 3, 8>; // Subtract. + def VFS : BinaryVRRcFloatGeneric<"vfs", 0xE7E2>; def VFSDB : BinaryVRRc<"vfsdb", 0xE7E2, fsub, v128db, v128db, 3, 0>; def WFSDB : BinaryVRRc<"wfsdb", 0xE7E2, fsub, v64db, v64db, 3, 8>; // Test data class immediate. let Defs = [CC] in { + def VFTCI : BinaryVRIeFloatGeneric<"vftci", 0xE74A>; def VFTCIDB : BinaryVRIe<"vftcidb", 0xE74A, z_vftci, v128g, v128db, 3, 0>; def WFTCIDB : BinaryVRIe<"wftcidb", 0xE74A, null_frag, v64g, v64db, 3, 8>; } @@ -893,26 +982,33 @@ let Predicates = [FeatureVector] in { let Predicates = [FeatureVector] in { // Compare scalar. - let Defs = [CC] in + let Defs = [CC] in { + def WFC : CompareVRRaFloatGeneric<"wfc", 0xE7CB>; def WFCDB : CompareVRRa<"wfcdb", 0xE7CB, z_fcmp, v64db, 3>; + } // Compare and signal scalar. - let Defs = [CC] in + let Defs = [CC] in { + def WFK : CompareVRRaFloatGeneric<"wfk", 0xE7CA>; def WFKDB : CompareVRRa<"wfkdb", 0xE7CA, null_frag, v64db, 3>; + } // Compare equal. + def VFCE : BinaryVRRcSPairFloatGeneric<"vfce", 0xE7E8>; defm VFCEDB : BinaryVRRcSPair<"vfcedb", 0xE7E8, z_vfcmpe, z_vfcmpes, v128g, v128db, 3, 0>; defm WFCEDB : BinaryVRRcSPair<"wfcedb", 0xE7E8, null_frag, null_frag, v64g, v64db, 3, 8>; // Compare high. + def VFCH : BinaryVRRcSPairFloatGeneric<"vfch", 0xE7EB>; defm VFCHDB : BinaryVRRcSPair<"vfchdb", 0xE7EB, z_vfcmph, z_vfcmphs, v128g, v128db, 3, 0>; defm WFCHDB : BinaryVRRcSPair<"wfchdb", 0xE7EB, null_frag, null_frag, v64g, v64db, 3, 8>; // Compare high or equal. + def VFCHE : BinaryVRRcSPairFloatGeneric<"vfche", 0xE7EA>; defm VFCHEDB : BinaryVRRcSPair<"vfchedb", 0xE7EA, z_vfcmphe, z_vfcmphes, v128g, v128db, 3, 0>; defm WFCHEDB : BinaryVRRcSPair<"wfchedb", 0xE7EA, null_frag, null_frag, @@ -1036,6 +1132,7 @@ let AddedComplexity = 4 in { //===----------------------------------------------------------------------===// let Predicates = [FeatureVector] in { + defm VFAE : TernaryOptVRRbSPairGeneric<"vfae", 0xE782>; defm VFAEB : TernaryOptVRRbSPair<"vfaeb", 0xE782, int_s390_vfaeb, z_vfae_cc, v128b, v128b, 0>; defm VFAEH : TernaryOptVRRbSPair<"vfaeh", 0xE782, int_s390_vfaeh, @@ -1049,6 +1146,7 @@ let Predicates = [FeatureVector] in { defm VFAEZF : TernaryOptVRRbSPair<"vfaezf", 0xE782, int_s390_vfaezf, z_vfaez_cc, v128f, v128f, 2, 2>; + defm VFEE : BinaryExtraVRRbSPairGeneric<"vfee", 0xE780>; defm VFEEB : BinaryExtraVRRbSPair<"vfeeb", 0xE780, int_s390_vfeeb, z_vfee_cc, v128b, v128b, 0>; defm VFEEH : BinaryExtraVRRbSPair<"vfeeh", 0xE780, int_s390_vfeeh, @@ -1062,6 +1160,7 @@ let Predicates = [FeatureVector] in { defm VFEEZF : BinaryVRRbSPair<"vfeezf", 0xE780, int_s390_vfeezf, z_vfeez_cc, v128f, v128f, 2, 2>; + defm VFENE : BinaryExtraVRRbSPairGeneric<"vfene", 0xE781>; defm VFENEB : BinaryExtraVRRbSPair<"vfeneb", 0xE781, int_s390_vfeneb, z_vfene_cc, v128b, v128b, 0>; defm VFENEH : BinaryExtraVRRbSPair<"vfeneh", 0xE781, int_s390_vfeneh, @@ -1075,6 +1174,7 @@ let Predicates = [FeatureVector] in { defm VFENEZF : BinaryVRRbSPair<"vfenezf", 0xE781, int_s390_vfenezf, z_vfenez_cc, v128f, v128f, 2, 2>; + defm VISTR : UnaryExtraVRRaSPairGeneric<"vistr", 0xE75C>; defm VISTRB : UnaryExtraVRRaSPair<"vistrb", 0xE75C, int_s390_vistrb, z_vistr_cc, v128b, v128b, 0>; defm VISTRH : UnaryExtraVRRaSPair<"vistrh", 0xE75C, int_s390_vistrh, @@ -1082,6 +1182,7 @@ let Predicates = [FeatureVector] in { defm VISTRF : UnaryExtraVRRaSPair<"vistrf", 0xE75C, int_s390_vistrf, z_vistr_cc, v128f, v128f, 2>; + defm VSTRC : QuaternaryOptVRRdSPairGeneric<"vstrc", 0xE78A>; defm VSTRCB : QuaternaryOptVRRdSPair<"vstrcb", 0xE78A, int_s390_vstrcb, z_vstrc_cc, v128b, v128b, 0>; defm VSTRCH : QuaternaryOptVRRdSPair<"vstrch", 0xE78A, int_s390_vstrch, diff --git a/llvm/test/MC/Disassembler/SystemZ/insns-z13.txt b/llvm/test/MC/Disassembler/SystemZ/insns-z13.txt index 68869ab3369..147a7552f33 100644 --- a/llvm/test/MC/Disassembler/SystemZ/insns-z13.txt +++ b/llvm/test/MC/Disassembler/SystemZ/insns-z13.txt @@ -11,6 +11,15 @@ #CHECK: lcbb %r15, 4095(%r15,%r15), 15 0xe7 0xff 0xff 0xff 0xf0 0x27 +#CHECK: va %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xf3 + +#CHECK: va %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xf3 + +#CHECK: va %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xf3 + #CHECK: vab %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf3 @@ -20,6 +29,15 @@ #CHECK: vab %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x0e 0xf3 +#CHECK: vacc %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xf1 + +#CHECK: vacc %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xf1 + +#CHECK: vacc %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xf1 + #CHECK: vaccb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf1 @@ -29,6 +47,15 @@ #CHECK: vaccb %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x0e 0xf1 +#CHECK: vaccc %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xb9 + +#CHECK: vaccc %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xb9 + +#CHECK: vaccc %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xb9 + #CHECK: vacccq %v0, %v0, %v0, %v0 0xe7 0x00 0x04 0x00 0x00 0xb9 @@ -74,6 +101,15 @@ #CHECK: vaccq %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x4e 0xf1 +#CHECK: vac %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xbb + +#CHECK: vac %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xbb + +#CHECK: vac %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xbb + #CHECK: vacq %v0, %v0, %v0, %v0 0xe7 0x00 0x04 0x00 0x00 0xbb @@ -119,6 +155,15 @@ #CHECK: vaq %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x4e 0xf3 +#CHECK: vavg %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xf2 + +#CHECK: vavg %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xf2 + +#CHECK: vavg %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xf2 + #CHECK: vavgb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf2 @@ -155,6 +200,15 @@ #CHECK: vavgh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xf2 +#CHECK: vavgl %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xf0 + +#CHECK: vavgl %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xf0 + +#CHECK: vavgl %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xf0 + #CHECK: vavglb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf0 @@ -191,6 +245,15 @@ #CHECK: vavglh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xf0 +#CHECK: vcdg %v0, %v0, 11, 0, 0 +0xe7 0x00 0x00 0x00 0xb0 0xc3 + +#CHECK: vcdg %v19, %v14, 11, 4, 10 +0xe7 0x3e 0x00 0xa4 0xb8 0xc3 + +#CHECK: vcdg %v31, %v31, 11, 7, 15 +0xe7 0xff 0x00 0xf7 0xbc 0xc3 + #CHECK: vcdgb %v0, %v0, 0, 0 0xe7 0x00 0x00 0x00 0x30 0xc3 @@ -200,6 +263,15 @@ #CHECK: vcdgb %v31, %v31, 7, 15 0xe7 0xff 0x00 0xf7 0x3c 0xc3 +#CHECK: vcdlg %v0, %v0, 11, 0, 0 +0xe7 0x00 0x00 0x00 0xb0 0xc1 + +#CHECK: vcdlg %v19, %v14, 11, 4, 10 +0xe7 0x3e 0x00 0xa4 0xb8 0xc1 + +#CHECK: vcdlg %v31, %v31, 11, 7, 15 +0xe7 0xff 0x00 0xf7 0xbc 0xc1 + #CHECK: vcdlgb %v0, %v0, 0, 0 0xe7 0x00 0x00 0x00 0x30 0xc1 @@ -209,6 +281,18 @@ #CHECK: vcdlgb %v31, %v31, 7, 15 0xe7 0xff 0x00 0xf7 0x3c 0xc1 +#CHECK: vceq %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x90 0xb0 0xf8 + +#CHECK: vceq %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x90 0xba 0xf8 + +#CHECK: vceq %v7, %v24, %v9, 11, 9 +0xe7 0x78 0x90 0x90 0xb4 0xf8 + +#CHECK: vceq %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x90 0xbe 0xf8 + #CHECK: vceqb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf8 @@ -257,6 +341,15 @@ #CHECK: vceqh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xf8 +#CHECK: vcgd %v0, %v0, 11, 0, 0 +0xe7 0x00 0x00 0x00 0xb0 0xc2 + +#CHECK: vcgd %v19, %v14, 11, 4, 10 +0xe7 0x3e 0x00 0xa4 0xb8 0xc2 + +#CHECK: vcgd %v31, %v31, 11, 7, 15 +0xe7 0xff 0x00 0xf7 0xbc 0xc2 + #CHECK: vcgdb %v0, %v0, 0, 0 0xe7 0x00 0x00 0x00 0x30 0xc2 @@ -266,6 +359,18 @@ #CHECK: vcgdb %v31, %v31, 7, 15 0xe7 0xff 0x00 0xf7 0x3c 0xc2 +#CHECK: vch %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x90 0xb0 0xfb + +#CHECK: vch %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x90 0xba 0xfb + +#CHECK: vch %v7, %v24, %v9, 11, 9 +0xe7 0x78 0x90 0x90 0xb4 0xfb + +#CHECK: vch %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x90 0xbe 0xfb + #CHECK: vchb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xfb @@ -314,6 +419,18 @@ #CHECK: vchh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xfb +#CHECK: vchl %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x90 0xb0 0xf9 + +#CHECK: vchl %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x90 0xba 0xf9 + +#CHECK: vchl %v7, %v24, %v9, 11, 9 +0xe7 0x78 0x90 0x90 0xb4 0xf9 + +#CHECK: vchl %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x90 0xbe 0xf9 + #CHECK: vchlb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf9 @@ -371,6 +488,15 @@ #CHECK: vcksm %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x0e 0x66 +#CHECK: vclgd %v0, %v0, 11, 0, 0 +0xe7 0x00 0x00 0x00 0xb0 0xc0 + +#CHECK: vclgd %v19, %v14, 11, 4, 10 +0xe7 0x3e 0x00 0xa4 0xb8 0xc0 + +#CHECK: vclgd %v31, %v31, 11, 7, 15 +0xe7 0xff 0x00 0xf7 0xbc 0xc0 + #CHECK: vclgdb %v0, %v0, 0, 0 0xe7 0x00 0x00 0x00 0x30 0xc0 @@ -380,6 +506,15 @@ #CHECK: vclgdb %v31, %v31, 7, 15 0xe7 0xff 0x00 0xf7 0x3c 0xc0 +#CHECK: vclz %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x53 + +#CHECK: vclz %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0x53 + +#CHECK: vclz %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0x53 + #CHECK: vclzb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x53 @@ -416,6 +551,15 @@ #CHECK: vclzh %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0x53 +#CHECK: vctz %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x52 + +#CHECK: vctz %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0x52 + +#CHECK: vctz %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0x52 + #CHECK: vctzb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x52 @@ -452,6 +596,15 @@ #CHECK: vctzh %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0x52 +#CHECK: vec %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xdb + +#CHECK: vec %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xdb + +#CHECK: vec %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xdb + #CHECK: vecb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xdb @@ -488,6 +641,15 @@ #CHECK: vech %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0xdb +#CHECK: vecl %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xd9 + +#CHECK: vecl %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xd9 + +#CHECK: vecl %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xd9 + #CHECK: veclb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xd9 @@ -524,6 +686,15 @@ #CHECK: veclh %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0xd9 +#CHECK: verim %v0, %v0, %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x72 + +#CHECK: verim %v3, %v20, %v5, 103, 11 +0xe7 0x34 0x50 0x67 0xb4 0x72 + +#CHECK: verim %v31, %v31, %v31, 255, 11 +0xe7 0xff 0xf0 0xff 0xbe 0x72 + #CHECK: verimb %v0, %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x72 @@ -560,6 +731,15 @@ #CHECK: verimh %v31, %v31, %v31, 255 0xe7 0xff 0xf0 0xff 0x1e 0x72 +#CHECK: verllv %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x73 + +#CHECK: verllv %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x73 + +#CHECK: verllv %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x73 + #CHECK: verllvb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x73 @@ -596,6 +776,15 @@ #CHECK: verllvh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x73 +#CHECK: verll %v0, %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x33 + +#CHECK: verll %v12, %v18, 1110(%r3), 11 +0xe7 0xc2 0x34 0x56 0xb4 0x33 + +#CHECK: verll %v31, %v31, 4095(%r15), 11 +0xe7 0xff 0xff 0xff 0xbc 0x33 + #CHECK: verllb %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x33 @@ -632,6 +821,15 @@ #CHECK: verllh %v31, %v31, 4095(%r15) 0xe7 0xff 0xff 0xff 0x1c 0x33 +#CHECK: veslv %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x70 + +#CHECK: veslv %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x70 + +#CHECK: veslv %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x70 + #CHECK: veslvb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x70 @@ -668,6 +866,15 @@ #CHECK: veslvh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x70 +#CHECK: vesl %v0, %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x30 + +#CHECK: vesl %v12, %v18, 1110(%r3), 11 +0xe7 0xc2 0x34 0x56 0xb4 0x30 + +#CHECK: vesl %v31, %v31, 4095(%r15), 11 +0xe7 0xff 0xff 0xff 0xbc 0x30 + #CHECK: veslb %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x30 @@ -704,6 +911,15 @@ #CHECK: veslh %v31, %v31, 4095(%r15) 0xe7 0xff 0xff 0xff 0x1c 0x30 +#CHECK: vesrav %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x7a + +#CHECK: vesrav %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x7a + +#CHECK: vesrav %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x7a + #CHECK: vesravb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x7a @@ -740,6 +956,15 @@ #CHECK: vesravh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x7a +#CHECK: vesra %v0, %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x3a + +#CHECK: vesra %v12, %v18, 1110(%r3), 11 +0xe7 0xc2 0x34 0x56 0xb4 0x3a + +#CHECK: vesra %v31, %v31, 4095(%r15), 11 +0xe7 0xff 0xff 0xff 0xbc 0x3a + #CHECK: vesrab %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x3a @@ -776,6 +1001,15 @@ #CHECK: vesrah %v31, %v31, 4095(%r15) 0xe7 0xff 0xff 0xff 0x1c 0x3a +#CHECK: vesrlv %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x78 + +#CHECK: vesrlv %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x78 + +#CHECK: vesrlv %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x78 + #CHECK: vesrlvb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x78 @@ -812,6 +1046,15 @@ #CHECK: vesrlvh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x78 +#CHECK: vesrl %v0, %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x38 + +#CHECK: vesrl %v12, %v18, 1110(%r3), 11 +0xe7 0xc2 0x34 0x56 0xb4 0x38 + +#CHECK: vesrl %v31, %v31, 4095(%r15), 11 +0xe7 0xff 0xff 0xff 0xbc 0x38 + #CHECK: vesrlb %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x38 @@ -848,6 +1091,15 @@ #CHECK: vesrlh %v31, %v31, 4095(%r15) 0xe7 0xff 0xff 0xff 0x1c 0x38 +#CHECK: vfa %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xe3 + +#CHECK: vfa %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x09 0xba 0xe3 + +#CHECK: vfa %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x09 0xbe 0xe3 + #CHECK: vfadb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xe3 @@ -857,6 +1109,18 @@ #CHECK: vfadb %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x3e 0xe3 +#CHECK: vfae %v0, %v0, %v0, 11, 0 +0xe7 0x00 0x00 0x00 0xb0 0x82 + +#CHECK: vfae %v0, %v0, %v0, 11, 12 +0xe7 0x00 0x00 0xc0 0xb0 0x82 + +#CHECK: vfae %v18, %v3, %v20, 11, 0 +0xe7 0x23 0x40 0x00 0xba 0x82 + +#CHECK: vfae %v31, %v31, %v31, 11, 4 +0xe7 0xff 0xf0 0x40 0xbe 0x82 + #CHECK: vfaeb %v0, %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x82 @@ -920,6 +1184,15 @@ #CHECK: vfaezhs %v31, %v31, %v31, 8 0xe7 0xff 0xf0 0xb0 0x1e 0x82 +#CHECK: vfce %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xe8 + +#CHECK: vfce %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x09 0xba 0xe8 + +#CHECK: vfce %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x09 0xbe 0xe8 + #CHECK: vfcedb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xe8 @@ -938,6 +1211,15 @@ #CHECK: vfcedbs %v31, %v31, %v31 0xe7 0xff 0xf0 0x10 0x3e 0xe8 +#CHECK: vfch %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xeb + +#CHECK: vfch %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x09 0xba 0xeb + +#CHECK: vfch %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x09 0xbe 0xeb + #CHECK: vfchdb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xeb @@ -956,6 +1238,15 @@ #CHECK: vfchdbs %v31, %v31, %v31 0xe7 0xff 0xf0 0x10 0x3e 0xeb +#CHECK: vfche %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xea + +#CHECK: vfche %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x09 0xba 0xea + +#CHECK: vfche %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x09 0xbe 0xea + #CHECK: vfchedb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xea @@ -974,6 +1265,15 @@ #CHECK: vfchedbs %v31, %v31, %v31 0xe7 0xff 0xf0 0x10 0x3e 0xea +#CHECK: vfd %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xe5 + +#CHECK: vfd %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x09 0xba 0xe5 + +#CHECK: vfd %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x09 0xbe 0xe5 + #CHECK: vfddb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xe5 @@ -983,6 +1283,18 @@ #CHECK: vfddb %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x3e 0xe5 +#CHECK: vfee %v0, %v0, %v0, 11, 0 +0xe7 0x00 0x00 0x00 0xb0 0x80 + +#CHECK: vfee %v0, %v0, %v0, 11, 12 +0xe7 0x00 0x00 0xc0 0xb0 0x80 + +#CHECK: vfee %v18, %v3, %v20, 11, 0 +0xe7 0x23 0x40 0x00 0xba 0x80 + +#CHECK: vfee %v31, %v31, %v31, 11, 0 +0xe7 0xff 0xf0 0x00 0xbe 0x80 + #CHECK: vfeeb %v0, %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x80 @@ -1046,6 +1358,18 @@ #CHECK: vfeeh %v31, %v31, %v31, 0 0xe7 0xff 0xf0 0x00 0x1e 0x80 +#CHECK: vfene %v0, %v0, %v0, 11, 0 +0xe7 0x00 0x00 0x00 0xb0 0x81 + +#CHECK: vfene %v0, %v0, %v0, 11, 12 +0xe7 0x00 0x00 0xc0 0xb0 0x81 + +#CHECK: vfene %v18, %v3, %v20, 11, 0 +0xe7 0x23 0x40 0x00 0xba 0x81 + +#CHECK: vfene %v31, %v31, %v31, 11, 0 +0xe7 0xff 0xf0 0x00 0xbe 0x81 + #CHECK: vfeneb %v0, %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x81 @@ -1109,6 +1433,15 @@ #CHECK: vfeneh %v31, %v31, %v31, 0 0xe7 0xff 0xf0 0x00 0x1e 0x81 +#CHECK: vfi %v0, %v0, 11, 0, 0 +0xe7 0x00 0x00 0x00 0xb0 0xc7 + +#CHECK: vfi %v19, %v14, 11, 4, 10 +0xe7 0x3e 0x00 0xa4 0xb8 0xc7 + +#CHECK: vfi %v31, %v31, 11, 7, 15 +0xe7 0xff 0x00 0xf7 0xbc 0xc7 + #CHECK: vfidb %v0, %v0, 0, 0 0xe7 0x00 0x00 0x00 0x30 0xc7 @@ -1118,6 +1451,18 @@ #CHECK: vfidb %v31, %v31, 7, 15 0xe7 0xff 0x00 0xf7 0x3c 0xc7 +#CHECK: vistr %v0, %v0, 11, 0 +0xe7 0x00 0x00 0x00 0xb0 0x5c + +#CHECK: vistr %v0, %v0, 11, 12 +0xe7 0x00 0x00 0xc0 0xb0 0x5c + +#CHECK: vistr %v18, %v3, 11, 0 +0xe7 0x23 0x00 0x00 0xb8 0x5c + +#CHECK: vistr %v31, %v31, 11, 0 +0xe7 0xff 0x00 0x00 0xbc 0x5c + #CHECK: vistrb %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x5c @@ -1163,6 +1508,15 @@ #CHECK: vistrh %v31, %v31, 0 0xe7 0xff 0x00 0x00 0x1c 0x5c +#CHECK: vfma %v0, %v0, %v0, %v0, 9, 11 +0xe7 0x00 0x0b 0x09 0x00 0x8f + +#CHECK: vfma %v3, %v20, %v5, %v22, 9, 11 +0xe7 0x34 0x5b 0x09 0x65 0x8f + +#CHECK: vfma %v31, %v31, %v31, %v31, 9, 11 +0xe7 0xff 0xfb 0x09 0xff 0x8f + #CHECK: vfmadb %v0, %v0, %v0, %v0 0xe7 0x00 0x03 0x00 0x00 0x8f @@ -1172,6 +1526,15 @@ #CHECK: vfmadb %v31, %v31, %v31, %v31 0xe7 0xff 0xf3 0x00 0xff 0x8f +#CHECK: vfm %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xe7 + +#CHECK: vfm %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x09 0xba 0xe7 + +#CHECK: vfm %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x09 0xbe 0xe7 + #CHECK: vfmdb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xe7 @@ -1181,6 +1544,15 @@ #CHECK: vfmdb %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x3e 0xe7 +#CHECK: vfms %v0, %v0, %v0, %v0, 9, 11 +0xe7 0x00 0x0b 0x09 0x00 0x8e + +#CHECK: vfms %v3, %v20, %v5, %v22, 9, 11 +0xe7 0x34 0x5b 0x09 0x65 0x8e + +#CHECK: vfms %v31, %v31, %v31, %v31, 9, 11 +0xe7 0xff 0xfb 0x09 0xff 0x8e + #CHECK: vfmsdb %v0, %v0, %v0, %v0 0xe7 0x00 0x03 0x00 0x00 0x8e @@ -1190,6 +1562,15 @@ #CHECK: vfmsdb %v31, %v31, %v31, %v31 0xe7 0xff 0xf3 0x00 0xff 0x8e +#CHECK: vfs %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xe2 + +#CHECK: vfs %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x09 0xba 0xe2 + +#CHECK: vfs %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x09 0xbe 0xe2 + #CHECK: vfsdb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xe2 @@ -1235,6 +1616,15 @@ #CHECK: vgeg %v31, 4095(%v31,%r15), 1 0xe7 0xff 0xff 0xff 0x1c 0x12 +#CHECK: vgfma %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xbc + +#CHECK: vgfma %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xbc + +#CHECK: vgfma %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xbc + #CHECK: vgfmab %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xbc @@ -1271,6 +1661,15 @@ #CHECK: vgfmah %v31, %v31, %v31, %v31 0xe7 0xff 0xf1 0x00 0xff 0xbc +#CHECK: vgfm %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xb4 + +#CHECK: vgfm %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xb4 + +#CHECK: vgfm %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xb4 + #CHECK: vgfmb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xb4 @@ -1307,6 +1706,15 @@ #CHECK: vgfmh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xb4 +#CHECK: vgm %v0, 0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x46 + +#CHECK: vgm %v22, 55, 66, 11 +0xe7 0x60 0x37 0x42 0xb8 0x46 + +#CHECK: vgm %v31, 255, 255, 11 +0xe7 0xf0 0xff 0xff 0xb8 0x46 + #CHECK: vgmb %v0, 0, 0 0xe7 0x00 0x00 0x00 0x00 0x46 @@ -1361,6 +1769,15 @@ #CHECK: vlbb %v31, 4095(%r15,%r15), 15 0xe7 0xff 0xff 0xff 0xf8 0x07 +#CHECK: vlc %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xde + +#CHECK: vlc %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xde + +#CHECK: vlc %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xde + #CHECK: vlcb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xde @@ -1397,6 +1814,15 @@ #CHECK: vlch %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0xde +#CHECK: vlde %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xc4 + +#CHECK: vlde %v19, %v14, 11, 9 +0xe7 0x3e 0x00 0x09 0xb8 0xc4 + +#CHECK: vlde %v31, %v31, 11, 9 +0xe7 0xff 0x00 0x09 0xbc 0xc4 + #CHECK: vldeb %v0, %v0 0xe7 0x00 0x00 0x00 0x20 0xc4 @@ -1415,6 +1841,15 @@ #CHECK: vleb %v31, 4095(%r15,%r15), 15 0xe7 0xff 0xff 0xff 0xf8 0x00 +#CHECK: vled %v0, %v0, 11, 0, 0 +0xe7 0x00 0x00 0x00 0xb0 0xc5 + +#CHECK: vled %v19, %v14, 11, 4, 10 +0xe7 0x3e 0x00 0xa4 0xb8 0xc5 + +#CHECK: vled %v31, %v31, 11, 7, 15 +0xe7 0xff 0x00 0xf7 0xbc 0xc5 + #CHECK: vledb %v0, %v0, 0, 0 0xe7 0x00 0x00 0x00 0x30 0xc5 @@ -1487,6 +1922,24 @@ #CHECK: vleih %v31, -1, 7 0xe7 0xf0 0xff 0xff 0x78 0x41 +#CHECK: vfpso %v0, %v0, 11, 9, 7 +0xe7 0x00 0x00 0x79 0xb0 0xcc + +#CHECK: vfpso %v19, %v14, 11, 9, 7 +0xe7 0x3e 0x00 0x79 0xb8 0xcc + +#CHECK: vfpso %v31, %v31, 11, 9, 7 +0xe7 0xff 0x00 0x79 0xbc 0xcc + +#CHECK: vfpsodb %v0, %v0, 7 +0xe7 0x00 0x00 0x70 0x30 0xcc + +#CHECK: vfpsodb %v19, %v14, 7 +0xe7 0x3e 0x00 0x70 0x38 0xcc + +#CHECK: vfpsodb %v31, %v31, 7 +0xe7 0xff 0x00 0x70 0x3c 0xcc + #CHECK: vflcdb %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xcc @@ -1514,6 +1967,15 @@ #CHECK: vflpdb %v31, %v31 0xe7 0xff 0x00 0x20 0x3c 0xcc +#CHECK: vlgv %r0, %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x21 + +#CHECK: vlgv %r2, %v19, 1383(%r4), 11 +0xe7 0x23 0x45 0x67 0xb4 0x21 + +#CHECK: vlgv %r15, %v31, 4095(%r15), 11 +0xe7 0xff 0xff 0xff 0xb4 0x21 + #CHECK: vlgvb %r0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x21 @@ -1550,6 +2012,15 @@ #CHECK: vlgvh %r15, %v31, 4095(%r15) 0xe7 0xff 0xff 0xff 0x14 0x21 +#CHECK: vfsq %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xce + +#CHECK: vfsq %v19, %v14, 11, 9 +0xe7 0x3e 0x00 0x09 0xb8 0xce + +#CHECK: vfsq %v31, %v31, 11, 9 +0xe7 0xff 0x00 0x09 0xbc 0xce + #CHECK: vfsqdb %v0, %v0 0xe7 0x00 0x00 0x00 0x30 0xce @@ -1559,6 +2030,15 @@ #CHECK: vfsqdb %v31, %v31 0xe7 0xff 0x00 0x00 0x3c 0xce +#CHECK: vftci %v0, %v0, 0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0x4a + +#CHECK: vftci %v19, %v4, 1383, 11, 9 +0xe7 0x34 0x56 0x79 0xb8 0x4a + +#CHECK: vftci %v31, %v31, 4095, 11, 9 +0xe7 0xff 0xff 0xf9 0xbc 0x4a + #CHECK: vftcidb %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x30 0x4a @@ -1577,6 +2057,15 @@ #CHECK: vll %v31, %r15, 4095(%r15) 0xe7 0xff 0xff 0xff 0x08 0x37 +#CHECK: vllez %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x04 + +#CHECK: vllez %v17, 2475(%r7,%r8), 11 +0xe7 0x17 0x89 0xab 0xb8 0x04 + +#CHECK: vllez %v31, 4095(%r15,%r15), 11 +0xe7 0xff 0xff 0xff 0xb8 0x04 + #CHECK: vllezb %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x04 @@ -1622,6 +2111,15 @@ #CHECK: vlm %v31, %v31, 4095(%r15) 0xe7 0xff 0xff 0xff 0x0c 0x36 +#CHECK: vlp %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xdf + +#CHECK: vlp %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xdf + +#CHECK: vlp %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xdf + #CHECK: vlpb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xdf @@ -1667,6 +2165,15 @@ #CHECK: vlr %v31, %v31 0xe7 0xff 0x00 0x00 0x0c 0x56 +#CHECK: vlrep %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x05 + +#CHECK: vlrep %v17, 2475(%r7,%r8), 11 +0xe7 0x17 0x89 0xab 0xb8 0x05 + +#CHECK: vlrep %v31, 4095(%r15,%r15), 11 +0xe7 0xff 0xff 0xff 0xb8 0x05 + #CHECK: vlrepb %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x05 @@ -1703,6 +2210,15 @@ #CHECK: vlreph %v31, 4095(%r15,%r15) 0xe7 0xff 0xff 0xff 0x18 0x05 +#CHECK: vlvg %v0, %r0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x22 + +#CHECK: vlvg %v18, %r3, 1383(%r4), 11 +0xe7 0x23 0x45 0x67 0xb8 0x22 + +#CHECK: vlvg %v31, %r15, 4095(%r15), 11 +0xe7 0xff 0xff 0xff 0xb8 0x22 + #CHECK: vlvgb %v0, %r0, 0 0xe7 0x00 0x00 0x00 0x00 0x22 @@ -1748,6 +2264,15 @@ #CHECK: vlvgp %v31, %r15, %r15 0xe7 0xff 0xf0 0x00 0x08 0x62 +#CHECK: vmae %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xae + +#CHECK: vmae %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xae + +#CHECK: vmae %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xae + #CHECK: vmaeb %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xae @@ -1775,6 +2300,15 @@ #CHECK: vmaeh %v31, %v31, %v31, %v31 0xe7 0xff 0xf1 0x00 0xff 0xae +#CHECK: vmah %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xab + +#CHECK: vmah %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xab + +#CHECK: vmah %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xab + #CHECK: vmahb %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xab @@ -1802,6 +2336,15 @@ #CHECK: vmahh %v31, %v31, %v31, %v31 0xe7 0xff 0xf1 0x00 0xff 0xab +#CHECK: vmal %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xaa + +#CHECK: vmal %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xaa + +#CHECK: vmal %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xaa + #CHECK: vmalb %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xaa @@ -1811,6 +2354,15 @@ #CHECK: vmalb %v31, %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0xff 0xaa +#CHECK: vmale %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xac + +#CHECK: vmale %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xac + +#CHECK: vmale %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xac + #CHECK: vmaleb %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xac @@ -1847,6 +2399,15 @@ #CHECK: vmalf %v31, %v31, %v31, %v31 0xe7 0xff 0xf2 0x00 0xff 0xaa +#CHECK: vmalh %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xa9 + +#CHECK: vmalh %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xa9 + +#CHECK: vmalh %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xa9 + #CHECK: vmalhb %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa9 @@ -1883,6 +2444,15 @@ #CHECK: vmalhw %v31, %v31, %v31, %v31 0xe7 0xff 0xf1 0x00 0xff 0xaa +#CHECK: vmalo %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xad + +#CHECK: vmalo %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xad + +#CHECK: vmalo %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xad + #CHECK: vmalob %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xad @@ -1910,6 +2480,15 @@ #CHECK: vmaloh %v31, %v31, %v31, %v31 0xe7 0xff 0xf1 0x00 0xff 0xad +#CHECK: vmao %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xaf + +#CHECK: vmao %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xaf + +#CHECK: vmao %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xaf + #CHECK: vmaob %v0, %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xaf @@ -1937,6 +2516,15 @@ #CHECK: vmaoh %v31, %v31, %v31, %v31 0xe7 0xff 0xf1 0x00 0xff 0xaf +#CHECK: vme %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xa6 + +#CHECK: vme %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xa6 + +#CHECK: vme %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xa6 + #CHECK: vmeb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa6 @@ -1964,6 +2552,15 @@ #CHECK: vmeh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xa6 +#CHECK: vmh %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xa3 + +#CHECK: vmh %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xa3 + +#CHECK: vmh %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xa3 + #CHECK: vmhb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa3 @@ -1991,6 +2588,15 @@ #CHECK: vmhh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xa3 +#CHECK: vml %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xa2 + +#CHECK: vml %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xa2 + +#CHECK: vml %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xa2 + #CHECK: vmlb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa2 @@ -2009,6 +2615,15 @@ #CHECK: vmlf %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x2e 0xa2 +#CHECK: vmle %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xa4 + +#CHECK: vmle %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xa4 + +#CHECK: vmle %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xa4 + #CHECK: vmleb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa4 @@ -2036,6 +2651,15 @@ #CHECK: vmleh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xa4 +#CHECK: vmlh %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xa1 + +#CHECK: vmlh %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xa1 + +#CHECK: vmlh %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xa1 + #CHECK: vmlhb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa1 @@ -2072,6 +2696,15 @@ #CHECK: vmlhw %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xa2 +#CHECK: vmlo %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xa5 + +#CHECK: vmlo %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xa5 + +#CHECK: vmlo %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xa5 + #CHECK: vmlob %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa5 @@ -2099,6 +2732,15 @@ #CHECK: vmloh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xa5 +#CHECK: vmn %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xfe + +#CHECK: vmn %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xfe + +#CHECK: vmn %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xfe + #CHECK: vmnb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xfe @@ -2135,6 +2777,15 @@ #CHECK: vmnh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xfe +#CHECK: vmnl %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xfc + +#CHECK: vmnl %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xfc + +#CHECK: vmnl %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xfc + #CHECK: vmnlb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xfc @@ -2171,6 +2822,15 @@ #CHECK: vmnlh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xfc +#CHECK: vmo %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xa7 + +#CHECK: vmo %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xa7 + +#CHECK: vmo %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xa7 + #CHECK: vmob %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xa7 @@ -2198,6 +2858,15 @@ #CHECK: vmoh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xa7 +#CHECK: vmrh %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x61 + +#CHECK: vmrh %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x61 + +#CHECK: vmrh %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x61 + #CHECK: vmrhb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x61 @@ -2234,6 +2903,15 @@ #CHECK: vmrhh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x61 +#CHECK: vmrl %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x60 + +#CHECK: vmrl %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x60 + +#CHECK: vmrl %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x60 + #CHECK: vmrlb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x60 @@ -2270,6 +2948,15 @@ #CHECK: vmrlh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x60 +#CHECK: vmx %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xff + +#CHECK: vmx %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xff + +#CHECK: vmx %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xff + #CHECK: vmxb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xff @@ -2306,6 +2993,15 @@ #CHECK: vmxh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0xff +#CHECK: vmxl %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xfd + +#CHECK: vmxl %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xfd + +#CHECK: vmxl %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xfd + #CHECK: vmxlb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xfd @@ -2396,6 +3092,15 @@ #CHECK: vperm %v31, %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0xff 0x8c +#CHECK: vpk %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x94 + +#CHECK: vpk %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x94 + +#CHECK: vpk %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x94 + #CHECK: vpkf %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x20 0x94 @@ -2423,6 +3128,15 @@ #CHECK: vpkh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x94 +#CHECK: vpkls %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x90 0xb0 0x95 + +#CHECK: vpkls %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x90 0xba 0x95 + +#CHECK: vpkls %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x90 0xbe 0x95 + #CHECK: vpklsf %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x20 0x95 @@ -2459,6 +3173,15 @@ #CHECK: vpklsh %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x1e 0x95 +#CHECK: vpks %v0, %v0, %v0, 11, 9 +0xe7 0x00 0x00 0x90 0xb0 0x97 + +#CHECK: vpks %v18, %v3, %v20, 11, 9 +0xe7 0x23 0x40 0x90 0xba 0x97 + +#CHECK: vpks %v31, %v31, %v31, 11, 9 +0xe7 0xff 0xf0 0x90 0xbe 0x97 + #CHECK: vpksf %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x20 0x97 @@ -2504,6 +3227,15 @@ #CHECK: vpopct %v31, %v31 0xe7 0xff 0x00 0x00 0x0c 0x50 +#CHECK: vrep %v0, %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x4d + +#CHECK: vrep %v19, %v4, 22136, 11 +0xe7 0x34 0x56 0x78 0xb8 0x4d + +#CHECK: vrep %v31, %v31, 65535, 11 +0xe7 0xff 0xff 0xff 0xbc 0x4d + #CHECK: vrepb %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x4d @@ -2540,6 +3272,15 @@ #CHECK: vreph %v31, %v31, 65535 0xe7 0xff 0xff 0xff 0x1c 0x4d +#CHECK: vrepi %v0, 0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x45 + +#CHECK: vrepi %v23, -30293, 11 +0xe7 0x70 0x89 0xab 0xb8 0x45 + +#CHECK: vrepi %v31, -1, 11 +0xe7 0xf0 0xff 0xff 0xb8 0x45 + #CHECK: vrepib %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x45 @@ -2576,6 +3317,15 @@ #CHECK: vrepih %v31, -1 0xe7 0xf0 0xff 0xff 0x18 0x45 +#CHECK: vs %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xf7 + +#CHECK: vs %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xf7 + +#CHECK: vs %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xf7 + #CHECK: vsb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf7 @@ -2585,6 +3335,15 @@ #CHECK: vsb %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x0e 0xf7 +#CHECK: vsbi %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xbf + +#CHECK: vsbi %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xbf + +#CHECK: vsbi %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xbf + #CHECK: vsbiq %v0, %v0, %v0, %v0 0xe7 0x00 0x04 0x00 0x00 0xbf @@ -2594,6 +3353,15 @@ #CHECK: vsbiq %v31, %v31, %v31, %v31 0xe7 0xff 0xf4 0x00 0xff 0xbf +#CHECK: vsbcbi %v0, %v0, %v0, %v0, 11 +0xe7 0x00 0x0b 0x00 0x00 0xbd + +#CHECK: vsbcbi %v3, %v20, %v5, %v22, 11 +0xe7 0x34 0x5b 0x00 0x65 0xbd + +#CHECK: vsbcbi %v31, %v31, %v31, %v31, 11 +0xe7 0xff 0xfb 0x00 0xff 0xbd + #CHECK: vsbcbiq %v0, %v0, %v0, %v0 0xe7 0x00 0x04 0x00 0x00 0xbd @@ -2603,6 +3371,15 @@ #CHECK: vsbcbiq %v31, %v31, %v31, %v31 0xe7 0xff 0xf4 0x00 0xff 0xbd +#CHECK: vscbi %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xf5 + +#CHECK: vscbi %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0xf5 + +#CHECK: vscbi %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0xf5 + #CHECK: vscbib %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xf5 @@ -2666,6 +3443,15 @@ #CHECK: vsceg %v31, 4095(%v31,%r15), 1 0xe7 0xff 0xff 0xff 0x1c 0x1a +#CHECK: vseg %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x5f + +#CHECK: vseg %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0x5f + +#CHECK: vseg %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0x5f + #CHECK: vsegb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x5f @@ -2864,6 +3650,18 @@ #CHECK: vstm %v31, %v31, 4095(%r15) 0xe7 0xff 0xff 0xff 0x0c 0x3e +#CHECK: vstrc %v0, %v0, %v0, %v0, 11, 0 +0xe7 0x00 0x0b 0x00 0x00 0x8a + +#CHECK: vstrc %v0, %v0, %v0, %v0, 11, 12 +0xe7 0x00 0x0b 0xc0 0x00 0x8a + +#CHECK: vstrc %v18, %v3, %v20, %v5, 11, 0 +0xe7 0x23 0x4b 0x00 0x5a 0x8a + +#CHECK: vstrc %v31, %v31, %v31, %v31, 11, 4 +0xe7 0xff 0xfb 0x40 0xff 0x8a + #CHECK: vstrcb %v0, %v0, %v0, %v0, 0 0xe7 0x00 0x00 0x00 0x00 0x8a @@ -2927,6 +3725,15 @@ #CHECK: vstrczhs %v31, %v31, %v31, %v31, 8 0xe7 0xff 0xf1 0xb0 0xff 0x8a +#CHECK: vsumg %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x65 + +#CHECK: vsumg %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x65 + +#CHECK: vsumg %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x65 + #CHECK: vsumgh %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x10 0x65 @@ -2945,6 +3752,15 @@ #CHECK: vsumgf %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x2e 0x65 +#CHECK: vsumq %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x67 + +#CHECK: vsumq %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x67 + +#CHECK: vsumq %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x67 + #CHECK: vsumqf %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x20 0x67 @@ -2963,6 +3779,15 @@ #CHECK: vsumqg %v31, %v31, %v31 0xe7 0xff 0xf0 0x00 0x3e 0x67 +#CHECK: vsum %v0, %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0x64 + +#CHECK: vsum %v18, %v3, %v20, 11 +0xe7 0x23 0x40 0x00 0xba 0x64 + +#CHECK: vsum %v31, %v31, %v31, 11 +0xe7 0xff 0xf0 0x00 0xbe 0x64 + #CHECK: vsumb %v0, %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0x64 @@ -2990,6 +3815,15 @@ #CHECK: vtm %v31, %v31 0xe7 0xff 0x00 0x00 0x0c 0xd8 +#CHECK: vuph %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xd7 + +#CHECK: vuph %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xd7 + +#CHECK: vuph %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xd7 + #CHECK: vuphb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xd7 @@ -3017,6 +3851,15 @@ #CHECK: vuphh %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0xd7 +#CHECK: vuplh %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xd5 + +#CHECK: vuplh %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xd5 + +#CHECK: vuplh %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xd5 + #CHECK: vuplhb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xd5 @@ -3044,6 +3887,15 @@ #CHECK: vuplhh %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0xd5 +#CHECK: vupl %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xd6 + +#CHECK: vupl %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xd6 + +#CHECK: vupl %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xd6 + #CHECK: vuplb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xd6 @@ -3071,6 +3923,15 @@ #CHECK: vuplhw %v31, %v31 0xe7 0xff 0x00 0x00 0x1c 0xd6 +#CHECK: vupll %v0, %v0, 11 +0xe7 0x00 0x00 0x00 0xb0 0xd4 + +#CHECK: vupll %v19, %v14, 11 +0xe7 0x3e 0x00 0x00 0xb8 0xd4 + +#CHECK: vupll %v31, %v31, 11 +0xe7 0xff 0x00 0x00 0xbc 0xd4 + #CHECK: vupllb %v0, %v0 0xe7 0x00 0x00 0x00 0x00 0xd4 @@ -3152,6 +4013,15 @@ #CHECK: wfadb %v31, %v31, %v31 0xe7 0xff 0xf0 0x08 0x3e 0xe3 +#CHECK: wfc %f0, %f0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xcb + +#CHECK: wfc %v19, %f14, 11, 9 +0xe7 0x3e 0x00 0x09 0xb8 0xcb + +#CHECK: wfc %v31, %v31, 11, 9 +0xe7 0xff 0x00 0x09 0xbc 0xcb + #CHECK: wfcdb %f0, %f0 0xe7 0x00 0x00 0x00 0x30 0xcb @@ -3233,6 +4103,15 @@ #CHECK: wfidb %v31, %v31, 7, 15 0xe7 0xff 0x00 0xff 0x3c 0xc7 +#CHECK: wfk %f0, %f0, 11, 9 +0xe7 0x00 0x00 0x09 0xb0 0xca + +#CHECK: wfk %v19, %f14, 11, 9 +0xe7 0x3e 0x00 0x09 0xb8 0xca + +#CHECK: wfk %v31, %v31, 11, 9 +0xe7 0xff 0x00 0x09 0xbc 0xca + #CHECK: wfkdb %f0, %f0 0xe7 0x00 0x00 0x00 0x30 0xca @@ -3242,6 +4121,15 @@ #CHECK: wfkdb %v31, %v31 0xe7 0xff 0x00 0x00 0x3c 0xca +#CHECK: wfpsodb %f0, %f0, 7 +0xe7 0x00 0x00 0x78 0x30 0xcc + +#CHECK: wfpsodb %v19, %f14, 7 +0xe7 0x3e 0x00 0x78 0x38 0xcc + +#CHECK: wfpsodb %v31, %v31, 7 +0xe7 0xff 0x00 0x78 0x3c 0xcc + #CHECK: wflcdb %f0, %f0 0xe7 0x00 0x00 0x08 0x30 0xcc diff --git a/llvm/test/MC/SystemZ/insn-bad-z13.s b/llvm/test/MC/SystemZ/insn-bad-z13.s index b0fbab525ba..9407d86bd57 100644 --- a/llvm/test/MC/SystemZ/insn-bad-z13.s +++ b/llvm/test/MC/SystemZ/insn-bad-z13.s @@ -20,6 +20,26 @@ lcbb %r0, 0(%v1,%r2), 0 #CHECK: error: invalid operand +#CHECK: vcdg %v0, %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vcdg %v0, %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vcdg %v0, %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vcdg %v0, %v0, 0, 16, 0 +#CHECK: error: invalid operand +#CHECK: vcdg %v0, %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vcdg %v0, %v0, 16, 0, 0 + + vcdg %v0, %v0, 0, 0, -1 + vcdg %v0, %v0, 0, 0, 16 + vcdg %v0, %v0, 0, -1, 0 + vcdg %v0, %v0, 0, 16, 0 + vcdg %v0, %v0, -1, 0, 0 + vcdg %v0, %v0, 16, 0, 0 + +#CHECK: error: invalid operand #CHECK: vcdgb %v0, %v0, 0, -1 #CHECK: error: invalid operand #CHECK: vcdgb %v0, %v0, 0, 16 @@ -34,6 +54,26 @@ vcdgb %v0, %v0, 16, 0 #CHECK: error: invalid operand +#CHECK: vcdlg %v0, %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vcdlg %v0, %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vcdlg %v0, %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vcdlg %v0, %v0, 0, 16, 0 +#CHECK: error: invalid operand +#CHECK: vcdlg %v0, %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vcdlg %v0, %v0, 16, 0, 0 + + vcdlg %v0, %v0, 0, 0, -1 + vcdlg %v0, %v0, 0, 0, 16 + vcdlg %v0, %v0, 0, -1, 0 + vcdlg %v0, %v0, 0, 16, 0 + vcdlg %v0, %v0, -1, 0, 0 + vcdlg %v0, %v0, 16, 0, 0 + +#CHECK: error: invalid operand #CHECK: vcdlgb %v0, %v0, 0, -1 #CHECK: error: invalid operand #CHECK: vcdlgb %v0, %v0, 0, 16 @@ -48,6 +88,26 @@ vcdlgb %v0, %v0, 16, 0 #CHECK: error: invalid operand +#CHECK: vcgd %v0, %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vcgd %v0, %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vcgd %v0, %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vcgd %v0, %v0, 0, 16, 0 +#CHECK: error: invalid operand +#CHECK: vcgd %v0, %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vcgd %v0, %v0, 16, 0, 0 + + vcgd %v0, %v0, 0, 0, -1 + vcgd %v0, %v0, 0, 0, 16 + vcgd %v0, %v0, 0, -1, 0 + vcgd %v0, %v0, 0, 16, 0 + vcgd %v0, %v0, -1, 0, 0 + vcgd %v0, %v0, 16, 0, 0 + +#CHECK: error: invalid operand #CHECK: vcgdb %v0, %v0, 0, -1 #CHECK: error: invalid operand #CHECK: vcgdb %v0, %v0, 0, 16 @@ -62,6 +122,26 @@ vcgdb %v0, %v0, 16, 0 #CHECK: error: invalid operand +#CHECK: vclgd %v0, %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vclgd %v0, %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vclgd %v0, %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vclgd %v0, %v0, 0, 16, 0 +#CHECK: error: invalid operand +#CHECK: vclgd %v0, %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vclgd %v0, %v0, 16, 0, 0 + + vclgd %v0, %v0, 0, 0, -1 + vclgd %v0, %v0, 0, 0, 16 + vclgd %v0, %v0, 0, -1, 0 + vclgd %v0, %v0, 0, 16, 0 + vclgd %v0, %v0, -1, 0, 0 + vclgd %v0, %v0, 16, 0, 0 + +#CHECK: error: invalid operand #CHECK: vclgdb %v0, %v0, 0, -1 #CHECK: error: invalid operand #CHECK: vclgdb %v0, %v0, 0, 16 @@ -76,6 +156,20 @@ vclgdb %v0, %v0, 16, 0 #CHECK: error: invalid operand +#CHECK: verim %v0, %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: verim %v0, %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: verim %v0, %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: verim %v0, %v0, %v0, 256, 0 + + verim %v0, %v0, %v0, 0, -1 + verim %v0, %v0, %v0, 0, 16 + verim %v0, %v0, %v0, -1, 0 + verim %v0, %v0, %v0, 256, 0 + +#CHECK: error: invalid operand #CHECK: verimb %v0, %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: verimb %v0, %v0, %v0, 256 @@ -108,6 +202,20 @@ verimh %v0, %v0, %v0, 256 #CHECK: error: invalid operand +#CHECK: verll %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: verll %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: verll %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: verll %v0, %v0, 4096, 0 + + verll %v0, %v0, 0, -1 + verll %v0, %v0, 0, 16 + verll %v0, %v0, -1, 0 + verll %v0, %v0, 4096, 0 + +#CHECK: error: invalid operand #CHECK: verllb %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: verllb %v0, %v0, 4096 @@ -140,6 +248,20 @@ verllh %v0, %v0, 4096 #CHECK: error: invalid operand +#CHECK: vesl %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vesl %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vesl %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vesl %v0, %v0, 4096, 0 + + vesl %v0, %v0, 0, -1 + vesl %v0, %v0, 0, 16 + vesl %v0, %v0, -1, 0 + vesl %v0, %v0, 4096, 0 + +#CHECK: error: invalid operand #CHECK: veslb %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: veslb %v0, %v0, 4096 @@ -172,6 +294,20 @@ veslh %v0, %v0, 4096 #CHECK: error: invalid operand +#CHECK: vesra %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vesra %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vesra %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vesra %v0, %v0, 4096, 0 + + vesra %v0, %v0, 0, -1 + vesra %v0, %v0, 0, 16 + vesra %v0, %v0, -1, 0 + vesra %v0, %v0, 4096, 0 + +#CHECK: error: invalid operand #CHECK: vesrab %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vesrab %v0, %v0, 4096 @@ -204,6 +340,20 @@ vesrah %v0, %v0, 4096 #CHECK: error: invalid operand +#CHECK: vesrl %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vesrl %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vesrl %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vesrl %v0, %v0, 4096, 0 + + vesrl %v0, %v0, 0, -1 + vesrl %v0, %v0, 0, 16 + vesrl %v0, %v0, -1, 0 + vesrl %v0, %v0, 4096, 0 + +#CHECK: error: invalid operand #CHECK: vesrlb %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vesrlb %v0, %v0, 4096 @@ -236,6 +386,26 @@ vesrlh %v0, %v0, 4096 #CHECK: error: invalid operand +#CHECK: vfae %v0, %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vfae %v0, %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vfae %v0, %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vfae %v0, %v0, %v0, 16, 0 +#CHECK: error: too few operands +#CHECK: vfae %v0, %v0, %v0 +#CHECK: error: invalid operand +#CHECK: vfae %v0, %v0, %v0, 0, 0, 0 + + vfae %v0, %v0, %v0, 0, -1 + vfae %v0, %v0, %v0, 0, 16 + vfae %v0, %v0, %v0, -1, 0 + vfae %v0, %v0, %v0, 16, 0 + vfae %v0, %v0, %v0 + vfae %v0, %v0, %v0, 0, 0, 0 + +#CHECK: error: invalid operand #CHECK: vfaeb %v0, %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vfaeb %v0, %v0, %v0, 16 @@ -320,6 +490,26 @@ vfaezfs %v0, %v0, %v0, 0, 0 #CHECK: error: invalid operand +#CHECK: vfee %v0, %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vfee %v0, %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vfee %v0, %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vfee %v0, %v0, %v0, 16, 0 +#CHECK: error: too few operands +#CHECK: vfee %v0, %v0, %v0 +#CHECK: error: invalid operand +#CHECK: vfee %v0, %v0, %v0, 0, 0, 0 + + vfee %v0, %v0, %v0, 0, -1 + vfee %v0, %v0, %v0, 0, 16 + vfee %v0, %v0, %v0, -1, 0 + vfee %v0, %v0, %v0, 16, 0 + vfee %v0, %v0, %v0 + vfee %v0, %v0, %v0, 0, 0, 0 + +#CHECK: error: invalid operand #CHECK: vfeeb %v0, %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vfeeb %v0, %v0, %v0, 16 @@ -434,6 +624,26 @@ vfeezhs %v0, %v0, %v0, 0 #CHECK: error: invalid operand +#CHECK: vfi %v0, %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vfi %v0, %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vfi %v0, %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vfi %v0, %v0, 0, 16, 0 +#CHECK: error: invalid operand +#CHECK: vfi %v0, %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vfi %v0, %v0, 16, 0, 0 + + vfi %v0, %v0, 0, 0, -1 + vfi %v0, %v0, 0, 0, 16 + vfi %v0, %v0, 0, -1, 0 + vfi %v0, %v0, 0, 16, 0 + vfi %v0, %v0, -1, 0, 0 + vfi %v0, %v0, 16, 0, 0 + +#CHECK: error: invalid operand #CHECK: vfidb %v0, %v0, 0, -1 #CHECK: error: invalid operand #CHECK: vfidb %v0, %v0, 0, 16 @@ -448,6 +658,26 @@ vfidb %v0, %v0, 16, 0 #CHECK: error: invalid operand +#CHECK: vftci %v0, %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vftci %v0, %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vftci %v0, %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vftci %v0, %v0, 0, 16, 0 +#CHECK: error: invalid operand +#CHECK: vftci %v0, %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vftci %v0, %v0, 4096, 0, 0 + + vftci %v0, %v0, 0, 0, -1 + vftci %v0, %v0, 0, 0, 16 + vftci %v0, %v0, 0, -1, 0 + vftci %v0, %v0, 0, 16, 0 + vftci %v0, %v0, -1, 0, 0 + vftci %v0, %v0, 4096, 0, 0 + +#CHECK: error: invalid operand #CHECK: vftcidb %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vftcidb %v0, %v0, 4096 @@ -504,62 +734,102 @@ vgeg %v0, 4096(%v0,%r1), 0 #CHECK: error: invalid operand -#CHECK: vgmb %v0, 0, -1 +#CHECK: vgm %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vgm %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vgm %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vgm %v0, 0, 256, 0 +#CHECK: error: invalid operand +#CHECK: vgm %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vgm %v0, 256, 0, 0 + + vgm %v0, 0, 0, -1 + vgm %v0, 0, 0, 16 + vgm %v0, 0, -1, 0 + vgm %v0, 0, 256, 0 + vgm %v0, -1, 0, 0 + vgm %v0, 256, 0, 0 + #CHECK: error: invalid operand #CHECK: vgmb %v0, 0, -1 #CHECK: error: invalid operand +#CHECK: vgmb %v0, 0, 256 +#CHECK: error: invalid operand #CHECK: vgmb %v0, -1, 0 #CHECK: error: invalid operand #CHECK: vgmb %v0, 256, 0 vgmb %v0, 0, -1 - vgmb %v0, 0, -1 + vgmb %v0, 0, 256 vgmb %v0, -1, 0 vgmb %v0, 256, 0 #CHECK: error: invalid operand #CHECK: vgmf %v0, 0, -1 #CHECK: error: invalid operand -#CHECK: vgmf %v0, 0, -1 +#CHECK: vgmf %v0, 0, 256 #CHECK: error: invalid operand #CHECK: vgmf %v0, -1, 0 #CHECK: error: invalid operand #CHECK: vgmf %v0, 256, 0 vgmf %v0, 0, -1 - vgmf %v0, 0, -1 + vgmf %v0, 0, 256 vgmf %v0, -1, 0 vgmf %v0, 256, 0 #CHECK: error: invalid operand #CHECK: vgmg %v0, 0, -1 #CHECK: error: invalid operand -#CHECK: vgmg %v0, 0, -1 +#CHECK: vgmg %v0, 0, 256 #CHECK: error: invalid operand #CHECK: vgmg %v0, -1, 0 #CHECK: error: invalid operand #CHECK: vgmg %v0, 256, 0 vgmg %v0, 0, -1 - vgmg %v0, 0, -1 + vgmg %v0, 0, 256 vgmg %v0, -1, 0 vgmg %v0, 256, 0 #CHECK: error: invalid operand #CHECK: vgmh %v0, 0, -1 #CHECK: error: invalid operand -#CHECK: vgmh %v0, 0, -1 +#CHECK: vgmh %v0, 0, 256 #CHECK: error: invalid operand #CHECK: vgmh %v0, -1, 0 #CHECK: error: invalid operand #CHECK: vgmh %v0, 256, 0 vgmh %v0, 0, -1 - vgmh %v0, 0, -1 + vgmh %v0, 0, 256 vgmh %v0, -1, 0 vgmh %v0, 256, 0 #CHECK: error: invalid operand +#CHECK: vistr %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vistr %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vistr %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vistr %v0, %v0, 16, 0 +#CHECK: error: too few operands +#CHECK: vistr %v0, %v0 +#CHECK: error: invalid operand +#CHECK: vistr %v0, %v0, 0, 0, 0 + + vistr %v0, %v0, 0, -1 + vistr %v0, %v0, 0, 16 + vistr %v0, %v0, -1, 0 + vistr %v0, %v0, 16, 0 + vistr %v0, %v0 + vistr %v0, %v0, 0, 0, 0 + +#CHECK: error: invalid operand #CHECK: vistrb %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vistrb %v0, %v0, 16 @@ -671,6 +941,26 @@ vleb %v0, 0(%v1,%r2), 0 #CHECK: error: invalid operand +#CHECK: vled %v0, %v0, 0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vled %v0, %v0, 0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vled %v0, %v0, 0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vled %v0, %v0, 0, 16, 0 +#CHECK: error: invalid operand +#CHECK: vled %v0, %v0, -1, 0, 0 +#CHECK: error: invalid operand +#CHECK: vled %v0, %v0, 16, 0, 0 + + vled %v0, %v0, 0, 0, -1 + vled %v0, %v0, 0, 0, 16 + vled %v0, %v0, 0, -1, 0 + vled %v0, %v0, 0, 16, 0 + vled %v0, %v0, -1, 0, 0 + vled %v0, %v0, 16, 0, 0 + +#CHECK: error: invalid operand #CHECK: vledb %v0, %v0, 0, -1 #CHECK: error: invalid operand #CHECK: vledb %v0, %v0, 0, 16 @@ -792,6 +1082,23 @@ vleih %v0, 32768, 0 #CHECK: error: invalid operand +#CHECK: vlgv %r0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vlgv %r0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vlgv %r0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vlgv %r0, %v0, 4096, 0 +#CHECK: error: %r0 used in an address +#CHECK: vlgv %r0, %v0, 0(%r0), 0 + + vlgv %r0, %v0, 0, -1 + vlgv %r0, %v0, 0, 16 + vlgv %r0, %v0, -1, 0 + vlgv %r0, %v0, 4096, 0 + vlgv %r0, %v0, 0(%r0), 0 + +#CHECK: error: invalid operand #CHECK: vlgvb %r0, %v0, -1 #CHECK: error: invalid operand #CHECK: vlgvb %r0, %v0, 4096 @@ -847,6 +1154,23 @@ vll %v0, %r0, 0(%r0) #CHECK: error: invalid operand +#CHECK: vllez %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vllez %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vllez %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vllez %v0, 4096, 0 +#CHECK: error: invalid use of vector addressing +#CHECK: vllez %v0, 0(%v1,%r2), 0 + + vllez %v0, 0, -1 + vllez %v0, 0, 16 + vllez %v0, -1, 0 + vllez %v0, 4096, 0 + vllez %v0, 0(%v1,%r2), 0 + +#CHECK: error: invalid operand #CHECK: vllezb %v0, -1 #CHECK: error: invalid operand #CHECK: vllezb %v0, 4096 @@ -899,6 +1223,23 @@ vlm %v0, %v0, 4096 #CHECK: error: invalid operand +#CHECK: vlrep %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vlrep %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vlrep %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vlrep %v0, 4096, 0 +#CHECK: error: invalid use of vector addressing +#CHECK: vlrep %v0, 0(%v1,%r2), 0 + + vlrep %v0, 0, -1 + vlrep %v0, 0, 16 + vlrep %v0, -1, 0 + vlrep %v0, 4096, 0 + vlrep %v0, 0(%v1,%r2), 0 + +#CHECK: error: invalid operand #CHECK: vlrepb %v0, -1 #CHECK: error: invalid operand #CHECK: vlrepb %v0, 4096 @@ -943,6 +1284,23 @@ vlreph %v0, 0(%v1,%r2) #CHECK: error: invalid operand +#CHECK: vlvg %v0, %r0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vlvg %v0, %r0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vlvg %v0, %r0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vlvg %v0, %r0, 4096, 0 +#CHECK: error: %r0 used in an address +#CHECK: vlvg %v0, %r0, 0(%r0), 0 + + vlvg %v0, %r0, 0, -1 + vlvg %v0, %r0, 0, 16 + vlvg %v0, %r0, -1, 0 + vlvg %v0, %r0, 4096, 0 + vlvg %v0, %r0, 0(%r0), 0 + +#CHECK: error: invalid operand #CHECK: vlvgb %v0, %r0, -1 #CHECK: error: invalid operand #CHECK: vlvgb %v0, %r0, 4096 @@ -987,6 +1345,26 @@ vlvgh %v0, %r0, 0(%r0) #CHECK: error: invalid operand +#CHECK: vfene %v0, %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vfene %v0, %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vfene %v0, %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vfene %v0, %v0, %v0, 16, 0 +#CHECK: error: too few operands +#CHECK: vfene %v0, %v0, %v0 +#CHECK: error: invalid operand +#CHECK: vfene %v0, %v0, %v0, 0, 0, 0 + + vfene %v0, %v0, %v0, 0, -1 + vfene %v0, %v0, %v0, 0, 16 + vfene %v0, %v0, %v0, -1, 0 + vfene %v0, %v0, %v0, 16, 0 + vfene %v0, %v0, %v0 + vfene %v0, %v0, %v0, 0, 0, 0 + +#CHECK: error: invalid operand #CHECK: vfeneb %v0, %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vfeneb %v0, %v0, %v0, 16 @@ -1101,6 +1479,20 @@ vpdi %v0, %v0, %v0, 16 #CHECK: error: invalid operand +#CHECK: vrep %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vrep %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vrep %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vrep %v0, %v0, 65536, 0 + + vrep %v0, %v0, 0, -1 + vrep %v0, %v0, 0, 16 + vrep %v0, %v0, -1, 0 + vrep %v0, %v0, 65536, 0 + +#CHECK: error: invalid operand #CHECK: vrepb %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vrepb %v0, %v0, 65536 @@ -1133,6 +1525,20 @@ vreph %v0, %v0, 65536 #CHECK: error: invalid operand +#CHECK: vrepi %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vrepi %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vrepi %v0, -32769, 0 +#CHECK: error: invalid operand +#CHECK: vrepi %v0, 32768, 0 + + vrepi %v0, 0, -1 + vrepi %v0, 0, 16 + vrepi %v0, -32769, 0 + vrepi %v0, 32768, 0 + +#CHECK: error: invalid operand #CHECK: vrepib %v0, -32769 #CHECK: error: invalid operand #CHECK: vrepib %v0, 32768 @@ -1311,6 +1717,26 @@ vstm %v0, %v0, 4096 #CHECK: error: invalid operand +#CHECK: vstrc %v0, %v0, %v0, %v0, 0, -1 +#CHECK: error: invalid operand +#CHECK: vstrc %v0, %v0, %v0, %v0, 0, 16 +#CHECK: error: invalid operand +#CHECK: vstrc %v0, %v0, %v0, %v0, -1, 0 +#CHECK: error: invalid operand +#CHECK: vstrc %v0, %v0, %v0, %v0, 16, 0 +#CHECK: error: too few operands +#CHECK: vstrc %v0, %v0, %v0, %v0 +#CHECK: error: invalid operand +#CHECK: vstrc %v0, %v0, %v0, %v0, 0, 0, 0 + + vstrc %v0, %v0, %v0, %v0, 0, -1 + vstrc %v0, %v0, %v0, %v0, 0, 16 + vstrc %v0, %v0, %v0, %v0, -1, 0 + vstrc %v0, %v0, %v0, %v0, 16, 0 + vstrc %v0, %v0, %v0, %v0 + vstrc %v0, %v0, %v0, %v0, 0, 0, 0 + +#CHECK: error: invalid operand #CHECK: vstrcb %v0, %v0, %v0, %v0, -1 #CHECK: error: invalid operand #CHECK: vstrcb %v0, %v0, %v0, %v0, 16 diff --git a/llvm/test/MC/SystemZ/insn-good-z13.s b/llvm/test/MC/SystemZ/insn-good-z13.s index 5c25658271c..8946fde14e5 100644 --- a/llvm/test/MC/SystemZ/insn-good-z13.s +++ b/llvm/test/MC/SystemZ/insn-good-z13.s @@ -18,6 +18,20 @@ lcbb %r15, 0, 0 lcbb %r2, 1383(%r3,%r4), 8 +#CHECK: va %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf3] +#CHECK: va %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf3] +#CHECK: va %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf3] +#CHECK: va %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf3] +#CHECK: va %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf3] +#CHECK: va %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xf3] + + va %v0, %v0, %v0, 0 + va %v0, %v0, %v0, 15 + va %v0, %v0, %v31, 0 + va %v0, %v31, %v0, 0 + va %v31, %v0, %v0, 0 + va %v18, %v3, %v20, 11 + #CHECK: vab %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf3] #CHECK: vab %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf3] #CHECK: vab %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf3] @@ -30,6 +44,36 @@ vab %v31, %v0, %v0 vab %v18, %v3, %v20 +#CHECK: vac %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xbb] +#CHECK: vac %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xbb] +#CHECK: vac %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xbb] +#CHECK: vac %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xbb] +#CHECK: vac %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xbb] +#CHECK: vac %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xbb] +#CHECK: vac %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xbb] + + vac %v0, %v0, %v0, %v0, 0 + vac %v0, %v0, %v0, %v0, 15 + vac %v0, %v0, %v0, %v31, 0 + vac %v0, %v0, %v31, %v0, 0 + vac %v0, %v31, %v0, %v0, 0 + vac %v31, %v0, %v0, %v0, 0 + vac %v13, %v17, %v21, %v25, 11 + +#CHECK: vacc %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf1] +#CHECK: vacc %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf1] +#CHECK: vacc %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf1] +#CHECK: vacc %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf1] +#CHECK: vacc %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf1] +#CHECK: vacc %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xf1] + + vacc %v0, %v0, %v0, 0 + vacc %v0, %v0, %v0, 15 + vacc %v0, %v0, %v31, 0 + vacc %v0, %v31, %v0, 0 + vacc %v31, %v0, %v0, 0 + vacc %v18, %v3, %v20, 11 + #CHECK: vaccb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf1] #CHECK: vaccb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf1] #CHECK: vaccb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf1] @@ -42,6 +86,22 @@ vaccb %v31, %v0, %v0 vaccb %v18, %v3, %v20 +#CHECK: vaccc %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xb9] +#CHECK: vaccc %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xb9] +#CHECK: vaccc %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xb9] +#CHECK: vaccc %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xb9] +#CHECK: vaccc %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xb9] +#CHECK: vaccc %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xb9] +#CHECK: vaccc %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xb9] + + vaccc %v0, %v0, %v0, %v0, 0 + vaccc %v0, %v0, %v0, %v0, 15 + vaccc %v0, %v0, %v0, %v31, 0 + vaccc %v0, %v0, %v31, %v0, 0 + vaccc %v0, %v31, %v0, %v0, 0 + vaccc %v31, %v0, %v0, %v0, 0 + vaccc %v13, %v17, %v21, %v25, 11 + #CHECK: vacccq %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x04,0x00,0x00,0xb9] #CHECK: vacccq %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x04,0x00,0xf1,0xb9] #CHECK: vacccq %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf4,0x00,0x02,0xb9] @@ -166,6 +226,20 @@ vaq %v31, %v0, %v0 vaq %v18, %v3, %v20 +#CHECK: vavg %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf2] +#CHECK: vavg %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf2] +#CHECK: vavg %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf2] +#CHECK: vavg %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf2] +#CHECK: vavg %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf2] +#CHECK: vavg %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xf2] + + vavg %v0, %v0, %v0, 0 + vavg %v0, %v0, %v0, 15 + vavg %v0, %v0, %v31, 0 + vavg %v0, %v31, %v0, 0 + vavg %v31, %v0, %v0, 0 + vavg %v18, %v3, %v20, 11 + #CHECK: vavgb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf2] #CHECK: vavgb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf2] #CHECK: vavgb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf2] @@ -214,6 +288,20 @@ vavgh %v31, %v0, %v0 vavgh %v18, %v3, %v20 +#CHECK: vavgl %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf0] +#CHECK: vavgl %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf0] +#CHECK: vavgl %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf0] +#CHECK: vavgl %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf0] +#CHECK: vavgl %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf0] +#CHECK: vavgl %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xf0] + + vavgl %v0, %v0, %v0, 0 + vavgl %v0, %v0, %v0, 15 + vavgl %v0, %v0, %v31, 0 + vavgl %v0, %v31, %v0, 0 + vavgl %v31, %v0, %v0, 0 + vavgl %v18, %v3, %v20, 11 + #CHECK: vavglb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf0] #CHECK: vavglb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf0] #CHECK: vavglb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf0] @@ -262,6 +350,24 @@ vavglh %v31, %v0, %v0 vavglh %v18, %v3, %v20 +#CHECK: vcdg %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xc3] +#CHECK: vcdg %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xc3] +#CHECK: vcdg %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xc3] +#CHECK: vcdg %v0, %v0, 0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x00,0xc3] +#CHECK: vcdg %v0, %v0, 0, 12, 0 # encoding: [0xe7,0x00,0x00,0x0c,0x00,0xc3] +#CHECK: vcdg %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xc3] +#CHECK: vcdg %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xc3] +#CHECK: vcdg %v14, %v17, 11, 4, 10 # encoding: [0xe7,0xe1,0x00,0xa4,0xb4,0xc3] + + vcdg %v0, %v0, 0, 0, 0 + vcdg %v0, %v0, 15, 0, 0 + vcdg %v0, %v0, 0, 0, 15 + vcdg %v0, %v0, 0, 4, 0 + vcdg %v0, %v0, 0, 12, 0 + vcdg %v0, %v31, 0, 0, 0 + vcdg %v31, %v0, 0, 0, 0 + vcdg %v14, %v17, 11, 4, 10 + #CHECK: vcdgb %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xc3] #CHECK: vcdgb %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x30,0xc3] #CHECK: vcdgb %v0, %v0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x30,0xc3] @@ -278,6 +384,24 @@ vcdgb %v31, %v0, 0, 0 vcdgb %v14, %v17, 4, 10 +#CHECK: vcdlg %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xc1] +#CHECK: vcdlg %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xc1] +#CHECK: vcdlg %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xc1] +#CHECK: vcdlg %v0, %v0, 0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x00,0xc1] +#CHECK: vcdlg %v0, %v0, 0, 12, 0 # encoding: [0xe7,0x00,0x00,0x0c,0x00,0xc1] +#CHECK: vcdlg %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xc1] +#CHECK: vcdlg %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xc1] +#CHECK: vcdlg %v14, %v17, 11, 4, 10 # encoding: [0xe7,0xe1,0x00,0xa4,0xb4,0xc1] + + vcdlg %v0, %v0, 0, 0, 0 + vcdlg %v0, %v0, 15, 0, 0 + vcdlg %v0, %v0, 0, 0, 15 + vcdlg %v0, %v0, 0, 4, 0 + vcdlg %v0, %v0, 0, 12, 0 + vcdlg %v0, %v31, 0, 0, 0 + vcdlg %v31, %v0, 0, 0, 0 + vcdlg %v14, %v17, 11, 4, 10 + #CHECK: vcdlgb %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xc1] #CHECK: vcdlgb %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x30,0xc1] #CHECK: vcdlgb %v0, %v0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x30,0xc1] @@ -306,6 +430,22 @@ vcksm %v31, %v0, %v0 vcksm %v18, %v3, %v20 +#CHECK: vceq %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf8] +#CHECK: vceq %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf8] +#CHECK: vceq %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xf8] +#CHECK: vceq %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf8] +#CHECK: vceq %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf8] +#CHECK: vceq %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf8] +#CHECK: vceq %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x90,0xba,0xf8] + + vceq %v0, %v0, %v0, 0, 0 + vceq %v0, %v0, %v0, 15, 0 + vceq %v0, %v0, %v0, 0, 15 + vceq %v0, %v0, %v31, 0, 0 + vceq %v0, %v31, %v0, 0, 0 + vceq %v31, %v0, %v0, 0, 0 + vceq %v18, %v3, %v20, 11, 9 + #CHECK: vceqb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf8] #CHECK: vceqb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf8] #CHECK: vceqb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf8] @@ -362,6 +502,24 @@ vceqh %v18, %v3, %v20 vceqhs %v5, %v22, %v7 +#CHECK: vcgd %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xc2] +#CHECK: vcgd %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xc2] +#CHECK: vcgd %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xc2] +#CHECK: vcgd %v0, %v0, 0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x00,0xc2] +#CHECK: vcgd %v0, %v0, 0, 12, 0 # encoding: [0xe7,0x00,0x00,0x0c,0x00,0xc2] +#CHECK: vcgd %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xc2] +#CHECK: vcgd %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xc2] +#CHECK: vcgd %v14, %v17, 11, 4, 10 # encoding: [0xe7,0xe1,0x00,0xa4,0xb4,0xc2] + + vcgd %v0, %v0, 0, 0, 0 + vcgd %v0, %v0, 15, 0, 0 + vcgd %v0, %v0, 0, 0, 15 + vcgd %v0, %v0, 0, 4, 0 + vcgd %v0, %v0, 0, 12, 0 + vcgd %v0, %v31, 0, 0, 0 + vcgd %v31, %v0, 0, 0, 0 + vcgd %v14, %v17, 11, 4, 10 + #CHECK: vcgdb %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xc2] #CHECK: vcgdb %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x30,0xc2] #CHECK: vcgdb %v0, %v0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x30,0xc2] @@ -378,6 +536,22 @@ vcgdb %v31, %v0, 0, 0 vcgdb %v14, %v17, 4, 10 +#CHECK: vch %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfb] +#CHECK: vch %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xfb] +#CHECK: vch %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xfb] +#CHECK: vch %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfb] +#CHECK: vch %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfb] +#CHECK: vch %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xfb] +#CHECK: vch %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x90,0xba,0xfb] + + vch %v0, %v0, %v0, 0, 0 + vch %v0, %v0, %v0, 15, 0 + vch %v0, %v0, %v0, 0, 15 + vch %v0, %v0, %v31, 0, 0 + vch %v0, %v31, %v0, 0, 0 + vch %v31, %v0, %v0, 0, 0 + vch %v18, %v3, %v20, 11, 9 + #CHECK: vchb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfb] #CHECK: vchb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfb] #CHECK: vchb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfb] @@ -434,6 +608,22 @@ vchh %v18, %v3, %v20 vchhs %v5, %v22, %v7 +#CHECK: vchl %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf9] +#CHECK: vchl %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf9] +#CHECK: vchl %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xf9] +#CHECK: vchl %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf9] +#CHECK: vchl %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf9] +#CHECK: vchl %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf9] +#CHECK: vchl %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x90,0xba,0xf9] + + vchl %v0, %v0, %v0, 0, 0 + vchl %v0, %v0, %v0, 15, 0 + vchl %v0, %v0, %v0, 0, 15 + vchl %v0, %v0, %v31, 0, 0 + vchl %v0, %v31, %v0, 0, 0 + vchl %v31, %v0, %v0, 0, 0 + vchl %v18, %v3, %v20, 11, 9 + #CHECK: vchlb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf9] #CHECK: vchlb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf9] #CHECK: vchlb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf9] @@ -490,6 +680,24 @@ vchlh %v18, %v3, %v20 vchlhs %v5, %v22, %v7 +#CHECK: vclgd %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xc0] +#CHECK: vclgd %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xc0] +#CHECK: vclgd %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xc0] +#CHECK: vclgd %v0, %v0, 0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x00,0xc0] +#CHECK: vclgd %v0, %v0, 0, 12, 0 # encoding: [0xe7,0x00,0x00,0x0c,0x00,0xc0] +#CHECK: vclgd %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xc0] +#CHECK: vclgd %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xc0] +#CHECK: vclgd %v14, %v17, 11, 4, 10 # encoding: [0xe7,0xe1,0x00,0xa4,0xb4,0xc0] + + vclgd %v0, %v0, 0, 0, 0 + vclgd %v0, %v0, 15, 0, 0 + vclgd %v0, %v0, 0, 0, 15 + vclgd %v0, %v0, 0, 4, 0 + vclgd %v0, %v0, 0, 12, 0 + vclgd %v0, %v31, 0, 0, 0 + vclgd %v31, %v0, 0, 0, 0 + vclgd %v14, %v17, 11, 4, 10 + #CHECK: vclgdb %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xc0] #CHECK: vclgdb %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x30,0xc0] #CHECK: vclgdb %v0, %v0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x30,0xc0] @@ -506,6 +714,22 @@ vclgdb %v31, %v0, 0, 0 vclgdb %v14, %v17, 4, 10 +#CHECK: vclz %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x53] +#CHECK: vclz %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x53] +#CHECK: vclz %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x53] +#CHECK: vclz %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x53] +#CHECK: vclz %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x53] +#CHECK: vclz %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x53] +#CHECK: vclz %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0x53] + + vclz %v0, %v0, 0 + vclz %v0, %v0, 15 + vclz %v0, %v15, 0 + vclz %v0, %v31, 0 + vclz %v15, %v0, 0 + vclz %v31, %v0, 0 + vclz %v14, %v17, 11 + #CHECK: vclzb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x53] #CHECK: vclzb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x53] #CHECK: vclzb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x53] @@ -562,6 +786,22 @@ vclzh %v31, %v0 vclzh %v14, %v17 +#CHECK: vctz %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x52] +#CHECK: vctz %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x52] +#CHECK: vctz %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x52] +#CHECK: vctz %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x52] +#CHECK: vctz %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x52] +#CHECK: vctz %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x52] +#CHECK: vctz %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0x52] + + vctz %v0, %v0, 0 + vctz %v0, %v0, 15 + vctz %v0, %v15, 0 + vctz %v0, %v31, 0 + vctz %v15, %v0, 0 + vctz %v31, %v0, 0 + vctz %v14, %v17, 11 + #CHECK: vctzb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x52] #CHECK: vctzb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x52] #CHECK: vctzb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x52] @@ -618,6 +858,22 @@ vctzh %v31, %v0 vctzh %v14, %v17 +#CHECK: vec %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xdb] +#CHECK: vec %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xdb] +#CHECK: vec %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xdb] +#CHECK: vec %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xdb] +#CHECK: vec %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xdb] +#CHECK: vec %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xdb] +#CHECK: vec %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xdb] + + vec %v0, %v0, 0 + vec %v0, %v0, 15 + vec %v0, %v15, 0 + vec %v0, %v31, 0 + vec %v15, %v0, 0 + vec %v31, %v0, 0 + vec %v14, %v17, 11 + #CHECK: vecb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xdb] #CHECK: vecb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xdb] #CHECK: vecb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xdb] @@ -674,6 +930,22 @@ vech %v31, %v0 vech %v14, %v17 +#CHECK: vecl %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd9] +#CHECK: vecl %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xd9] +#CHECK: vecl %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd9] +#CHECK: vecl %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd9] +#CHECK: vecl %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xd9] +#CHECK: vecl %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xd9] +#CHECK: vecl %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xd9] + + vecl %v0, %v0, 0 + vecl %v0, %v0, 15 + vecl %v0, %v15, 0 + vecl %v0, %v31, 0 + vecl %v15, %v0, 0 + vecl %v31, %v0, 0 + vecl %v14, %v17, 11 + #CHECK: veclb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd9] #CHECK: veclb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd9] #CHECK: veclb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd9] @@ -730,6 +1002,22 @@ veclh %v31, %v0 veclh %v14, %v17 +#CHECK: verim %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x72] +#CHECK: verim %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x72] +#CHECK: verim %v0, %v0, %v0, 255, 0 # encoding: [0xe7,0x00,0x00,0xff,0x00,0x72] +#CHECK: verim %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x72] +#CHECK: verim %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x72] +#CHECK: verim %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x72] +#CHECK: verim %v13, %v17, %v21, 121, 11 # encoding: [0xe7,0xd1,0x50,0x79,0xb6,0x72] + + verim %v0, %v0, %v0, 0, 0 + verim %v0, %v0, %v0, 0, 15 + verim %v0, %v0, %v0, 255, 0 + verim %v0, %v0, %v31, 0, 0 + verim %v0, %v31, %v0, 0, 0 + verim %v31, %v0, %v0, 0, 0 + verim %v13, %v17, %v21, 0x79, 11 + #CHECK: verimb %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x72] #CHECK: verimb %v0, %v0, %v0, 255 # encoding: [0xe7,0x00,0x00,0xff,0x00,0x72] #CHECK: verimb %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x72] @@ -786,6 +1074,20 @@ verimh %v31, %v0, %v0, 0 verimh %v13, %v17, %v21, 0x79 +#CHECK: verllv %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x73] +#CHECK: verllv %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x73] +#CHECK: verllv %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x73] +#CHECK: verllv %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x73] +#CHECK: verllv %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x73] +#CHECK: verllv %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x73] + + verllv %v0, %v0, %v0, 0 + verllv %v0, %v0, %v0, 15 + verllv %v0, %v0, %v31, 0 + verllv %v0, %v31, %v0, 0 + verllv %v31, %v0, %v0, 0 + verllv %v18, %v3, %v20, 11 + #CHECK: verllvb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x73] #CHECK: verllvb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x73] #CHECK: verllvb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x73] @@ -834,6 +1136,22 @@ verllvh %v31, %v0, %v0 verllvh %v18, %v3, %v20 +#CHECK: verll %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x33] +#CHECK: verll %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x33] +#CHECK: verll %v0, %v0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x33] +#CHECK: verll %v0, %v0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x33] +#CHECK: verll %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x33] +#CHECK: verll %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x33] +#CHECK: verll %v14, %v17, 1074(%r5), 11 # encoding: [0xe7,0xe1,0x54,0x32,0xb4,0x33] + + verll %v0, %v0, 0, 0 + verll %v0, %v0, 0, 15 + verll %v0, %v0, 4095, 0 + verll %v0, %v0, 0(%r15), 0 + verll %v0, %v31, 0, 0 + verll %v31, %v0, 0, 0 + verll %v14, %v17, 1074(%r5), 11 + #CHECK: verllb %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x33] #CHECK: verllb %v0, %v0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x33] #CHECK: verllb %v0, %v0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x33] @@ -890,6 +1208,20 @@ verllh %v31, %v0, 0 verllh %v14, %v17, 1074(%r5) +#CHECK: veslv %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x70] +#CHECK: veslv %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x70] +#CHECK: veslv %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x70] +#CHECK: veslv %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x70] +#CHECK: veslv %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x70] +#CHECK: veslv %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x70] + + veslv %v0, %v0, %v0, 0 + veslv %v0, %v0, %v0, 15 + veslv %v0, %v0, %v31, 0 + veslv %v0, %v31, %v0, 0 + veslv %v31, %v0, %v0, 0 + veslv %v18, %v3, %v20, 11 + #CHECK: veslvb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x70] #CHECK: veslvb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x70] #CHECK: veslvb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x70] @@ -938,6 +1270,22 @@ veslvh %v31, %v0, %v0 veslvh %v18, %v3, %v20 +#CHECK: vesl %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x30] +#CHECK: vesl %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x30] +#CHECK: vesl %v0, %v0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x30] +#CHECK: vesl %v0, %v0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x30] +#CHECK: vesl %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x30] +#CHECK: vesl %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x30] +#CHECK: vesl %v14, %v17, 1074(%r5), 11 # encoding: [0xe7,0xe1,0x54,0x32,0xb4,0x30] + + vesl %v0, %v0, 0, 0 + vesl %v0, %v0, 0, 15 + vesl %v0, %v0, 4095, 0 + vesl %v0, %v0, 0(%r15), 0 + vesl %v0, %v31, 0, 0 + vesl %v31, %v0, 0, 0 + vesl %v14, %v17, 1074(%r5), 11 + #CHECK: veslb %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x30] #CHECK: veslb %v0, %v0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x30] #CHECK: veslb %v0, %v0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x30] @@ -994,6 +1342,20 @@ veslh %v31, %v0, 0 veslh %v14, %v17, 1074(%r5) +#CHECK: vesrav %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x7a] +#CHECK: vesrav %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x7a] +#CHECK: vesrav %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x7a] +#CHECK: vesrav %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x7a] +#CHECK: vesrav %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x7a] +#CHECK: vesrav %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x7a] + + vesrav %v0, %v0, %v0, 0 + vesrav %v0, %v0, %v0, 15 + vesrav %v0, %v0, %v31, 0 + vesrav %v0, %v31, %v0, 0 + vesrav %v31, %v0, %v0, 0 + vesrav %v18, %v3, %v20, 11 + #CHECK: vesravb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x7a] #CHECK: vesravb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x7a] #CHECK: vesravb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x7a] @@ -1042,6 +1404,22 @@ vesravh %v31, %v0, %v0 vesravh %v18, %v3, %v20 +#CHECK: vesra %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x3a] +#CHECK: vesra %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x3a] +#CHECK: vesra %v0, %v0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x3a] +#CHECK: vesra %v0, %v0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x3a] +#CHECK: vesra %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x3a] +#CHECK: vesra %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x3a] +#CHECK: vesra %v14, %v17, 1074(%r5), 11 # encoding: [0xe7,0xe1,0x54,0x32,0xb4,0x3a] + + vesra %v0, %v0, 0, 0 + vesra %v0, %v0, 0, 15 + vesra %v0, %v0, 4095, 0 + vesra %v0, %v0, 0(%r15), 0 + vesra %v0, %v31, 0, 0 + vesra %v31, %v0, 0, 0 + vesra %v14, %v17, 1074(%r5), 11 + #CHECK: vesrab %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x3a] #CHECK: vesrab %v0, %v0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x3a] #CHECK: vesrab %v0, %v0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x3a] @@ -1098,6 +1476,20 @@ vesrah %v31, %v0, 0 vesrah %v14, %v17, 1074(%r5) +#CHECK: vesrlv %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x78] +#CHECK: vesrlv %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x78] +#CHECK: vesrlv %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x78] +#CHECK: vesrlv %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x78] +#CHECK: vesrlv %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x78] +#CHECK: vesrlv %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x78] + + vesrlv %v0, %v0, %v0, 0 + vesrlv %v0, %v0, %v0, 15 + vesrlv %v0, %v0, %v31, 0 + vesrlv %v0, %v31, %v0, 0 + vesrlv %v31, %v0, %v0, 0 + vesrlv %v18, %v3, %v20, 11 + #CHECK: vesrlvb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x78] #CHECK: vesrlvb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x78] #CHECK: vesrlvb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x78] @@ -1146,6 +1538,22 @@ vesrlvh %v31, %v0, %v0 vesrlvh %v18, %v3, %v20 +#CHECK: vesrl %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x38] +#CHECK: vesrl %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x38] +#CHECK: vesrl %v0, %v0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x38] +#CHECK: vesrl %v0, %v0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x38] +#CHECK: vesrl %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x38] +#CHECK: vesrl %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x38] +#CHECK: vesrl %v14, %v17, 1074(%r5), 11 # encoding: [0xe7,0xe1,0x54,0x32,0xb4,0x38] + + vesrl %v0, %v0, 0, 0 + vesrl %v0, %v0, 0, 15 + vesrl %v0, %v0, 4095, 0 + vesrl %v0, %v0, 0(%r15), 0 + vesrl %v0, %v31, 0, 0 + vesrl %v31, %v0, 0, 0 + vesrl %v14, %v17, 1074(%r5), 11 + #CHECK: vesrlb %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x38] #CHECK: vesrlb %v0, %v0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x38] #CHECK: vesrlb %v0, %v0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x38] @@ -1202,6 +1610,22 @@ vesrlh %v31, %v0, 0 vesrlh %v14, %v17, 1074(%r5) +#CHECK: vfa %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xe3] +#CHECK: vfa %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xe3] +#CHECK: vfa %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xe3] +#CHECK: vfa %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xe3] +#CHECK: vfa %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xe3] +#CHECK: vfa %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xe3] +#CHECK: vfa %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x09,0xba,0xe3] + + vfa %v0, %v0, %v0, 0, 0 + vfa %v0, %v0, %v0, 15, 0 + vfa %v0, %v0, %v0, 0, 15 + vfa %v0, %v0, %v31, 0, 0 + vfa %v0, %v31, %v0, 0, 0 + vfa %v31, %v0, %v0, 0, 0 + vfa %v18, %v3, %v20, 11, 9 + #CHECK: vfadb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xe3] #CHECK: vfadb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x32,0xe3] #CHECK: vfadb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xe3] @@ -1214,6 +1638,34 @@ vfadb %v31, %v0, %v0 vfadb %v18, %v3, %v20 +#CHECK: vfae %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x82] +#CHECK: vfae %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x82] +#CHECK: vfae %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x82] +#CHECK: vfae %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x82] +#CHECK: vfae %v0, %v0, %v0, 0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x82] +#CHECK: vfae %v0, %v0, %v15, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x82] +#CHECK: vfae %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x82] +#CHECK: vfae %v0, %v15, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x82] +#CHECK: vfae %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x82] +#CHECK: vfae %v15, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x82] +#CHECK: vfae %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x82] +#CHECK: vfae %v18, %v3, %v20, 11, 4 # encoding: [0xe7,0x23,0x40,0x40,0xba,0x82] +#CHECK: vfae %v18, %v3, %v20, 0, 15 # encoding: [0xe7,0x23,0x40,0xf0,0x0a,0x82] + + vfae %v0, %v0, %v0, 0 + vfae %v0, %v0, %v0, 15 + vfae %v0, %v0, %v0, 0, 0 + vfae %v0, %v0, %v0, 15, 0 + vfae %v0, %v0, %v0, 0, 12 + vfae %v0, %v0, %v15, 0 + vfae %v0, %v0, %v31, 0 + vfae %v0, %v15, %v0, 0 + vfae %v0, %v31, %v0, 0 + vfae %v15, %v0, %v0, 0 + vfae %v31, %v0, %v0, 0 + vfae %v18, %v3, %v20, 11, 4 + vfae %v18, %v3, %v20, 0, 15 + #CHECK: vfaeb %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x82] #CHECK: vfaeb %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x82] #CHECK: vfaeb %v0, %v0, %v0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x82] @@ -1310,6 +1762,24 @@ vfaezhs %v18, %v3, %v20, 8 vfaezhs %v18, %v3, %v20, 15 +#CHECK: vfce %v0, %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xe8] +#CHECK: vfce %v0, %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xe8] +#CHECK: vfce %v0, %v0, %v0, 0, 15, 0 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xe8] +#CHECK: vfce %v0, %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xe8] +#CHECK: vfce %v0, %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xe8] +#CHECK: vfce %v0, %v31, %v0, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xe8] +#CHECK: vfce %v31, %v0, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xe8] +#CHECK: vfce %v18, %v3, %v20, 11, 9, 7 # encoding: [0xe7,0x23,0x40,0x79,0xba,0xe8] + + vfce %v0, %v0, %v0, 0, 0, 0 + vfce %v0, %v0, %v0, 15, 0, 0 + vfce %v0, %v0, %v0, 0, 15, 0 + vfce %v0, %v0, %v0, 0, 0, 15 + vfce %v0, %v0, %v31, 0, 0, 0 + vfce %v0, %v31, %v0, 0, 0, 0 + vfce %v31, %v0, %v0, 0, 0, 0 + vfce %v18, %v3, %v20, 11, 9, 7 + #CHECK: vfcedb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xe8] #CHECK: vfcedb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x32,0xe8] #CHECK: vfcedb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xe8] @@ -1334,6 +1804,24 @@ vfcedbs %v31, %v0, %v0 vfcedbs %v18, %v3, %v20 +#CHECK: vfch %v0, %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xeb] +#CHECK: vfch %v0, %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xeb] +#CHECK: vfch %v0, %v0, %v0, 0, 15, 0 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xeb] +#CHECK: vfch %v0, %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xeb] +#CHECK: vfch %v0, %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xeb] +#CHECK: vfch %v0, %v31, %v0, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xeb] +#CHECK: vfch %v31, %v0, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xeb] +#CHECK: vfch %v18, %v3, %v20, 11, 9, 7 # encoding: [0xe7,0x23,0x40,0x79,0xba,0xeb] + + vfch %v0, %v0, %v0, 0, 0, 0 + vfch %v0, %v0, %v0, 15, 0, 0 + vfch %v0, %v0, %v0, 0, 15, 0 + vfch %v0, %v0, %v0, 0, 0, 15 + vfch %v0, %v0, %v31, 0, 0, 0 + vfch %v0, %v31, %v0, 0, 0, 0 + vfch %v31, %v0, %v0, 0, 0, 0 + vfch %v18, %v3, %v20, 11, 9, 7 + #CHECK: vfchdb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xeb] #CHECK: vfchdb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x32,0xeb] #CHECK: vfchdb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xeb] @@ -1358,6 +1846,24 @@ vfchdbs %v31, %v0, %v0 vfchdbs %v18, %v3, %v20 +#CHECK: vfche %v0, %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xea] +#CHECK: vfche %v0, %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xea] +#CHECK: vfche %v0, %v0, %v0, 0, 15, 0 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xea] +#CHECK: vfche %v0, %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xea] +#CHECK: vfche %v0, %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xea] +#CHECK: vfche %v0, %v31, %v0, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xea] +#CHECK: vfche %v31, %v0, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xea] +#CHECK: vfche %v18, %v3, %v20, 11, 9, 7 # encoding: [0xe7,0x23,0x40,0x79,0xba,0xea] + + vfche %v0, %v0, %v0, 0, 0, 0 + vfche %v0, %v0, %v0, 15, 0, 0 + vfche %v0, %v0, %v0, 0, 15, 0 + vfche %v0, %v0, %v0, 0, 0, 15 + vfche %v0, %v0, %v31, 0, 0, 0 + vfche %v0, %v31, %v0, 0, 0, 0 + vfche %v31, %v0, %v0, 0, 0, 0 + vfche %v18, %v3, %v20, 11, 9, 7 + #CHECK: vfchedb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xea] #CHECK: vfchedb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x32,0xea] #CHECK: vfchedb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xea] @@ -1382,6 +1888,22 @@ vfchedbs %v31, %v0, %v0 vfchedbs %v18, %v3, %v20 +#CHECK: vfd %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xe5] +#CHECK: vfd %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xe5] +#CHECK: vfd %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xe5] +#CHECK: vfd %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xe5] +#CHECK: vfd %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xe5] +#CHECK: vfd %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xe5] +#CHECK: vfd %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x09,0xba,0xe5] + + vfd %v0, %v0, %v0, 0, 0 + vfd %v0, %v0, %v0, 15, 0 + vfd %v0, %v0, %v0, 0, 15 + vfd %v0, %v0, %v31, 0, 0 + vfd %v0, %v31, %v0, 0, 0 + vfd %v31, %v0, %v0, 0, 0 + vfd %v18, %v3, %v20, 11, 9 + #CHECK: vfddb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xe5] #CHECK: vfddb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x32,0xe5] #CHECK: vfddb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xe5] @@ -1394,6 +1916,34 @@ vfddb %v31, %v0, %v0 vfddb %v18, %v3, %v20 +#CHECK: vfee %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x80] +#CHECK: vfee %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x80] +#CHECK: vfee %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x80] +#CHECK: vfee %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x80] +#CHECK: vfee %v0, %v0, %v0, 0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x80] +#CHECK: vfee %v0, %v0, %v15, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x80] +#CHECK: vfee %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x80] +#CHECK: vfee %v0, %v15, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x80] +#CHECK: vfee %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x80] +#CHECK: vfee %v15, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x80] +#CHECK: vfee %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x80] +#CHECK: vfee %v18, %v3, %v20, 11, 4 # encoding: [0xe7,0x23,0x40,0x40,0xba,0x80] +#CHECK: vfee %v18, %v3, %v20, 0, 15 # encoding: [0xe7,0x23,0x40,0xf0,0x0a,0x80] + + vfee %v0, %v0, %v0, 0 + vfee %v0, %v0, %v0, 15 + vfee %v0, %v0, %v0, 0, 0 + vfee %v0, %v0, %v0, 15, 0 + vfee %v0, %v0, %v0, 0, 12 + vfee %v0, %v0, %v15, 0 + vfee %v0, %v0, %v31, 0 + vfee %v0, %v15, %v0, 0 + vfee %v0, %v31, %v0, 0 + vfee %v15, %v0, %v0, 0 + vfee %v31, %v0, %v0, 0 + vfee %v18, %v3, %v20, 11, 4 + vfee %v18, %v3, %v20, 0, 15 + #CHECK: vfeeb %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x80] #CHECK: vfeeb %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x80] #CHECK: vfeeb %v0, %v0, %v0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x80] @@ -1478,6 +2028,34 @@ vfeezh %v18, %v3, %v20 vfeezhs %v5, %v22, %v7 +#CHECK: vfene %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x81] +#CHECK: vfene %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x81] +#CHECK: vfene %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x81] +#CHECK: vfene %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x81] +#CHECK: vfene %v0, %v0, %v0, 0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x81] +#CHECK: vfene %v0, %v0, %v15, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x81] +#CHECK: vfene %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x81] +#CHECK: vfene %v0, %v15, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x81] +#CHECK: vfene %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x81] +#CHECK: vfene %v15, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x81] +#CHECK: vfene %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x81] +#CHECK: vfene %v18, %v3, %v20, 11, 4 # encoding: [0xe7,0x23,0x40,0x40,0xba,0x81] +#CHECK: vfene %v18, %v3, %v20, 0, 15 # encoding: [0xe7,0x23,0x40,0xf0,0x0a,0x81] + + vfene %v0, %v0, %v0, 0 + vfene %v0, %v0, %v0, 15 + vfene %v0, %v0, %v0, 0, 0 + vfene %v0, %v0, %v0, 15, 0 + vfene %v0, %v0, %v0, 0, 12 + vfene %v0, %v0, %v15, 0 + vfene %v0, %v0, %v31, 0 + vfene %v0, %v15, %v0, 0 + vfene %v0, %v31, %v0, 0 + vfene %v15, %v0, %v0, 0 + vfene %v31, %v0, %v0, 0 + vfene %v18, %v3, %v20, 11, 4 + vfene %v18, %v3, %v20, 0, 15 + #CHECK: vfeneb %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x81] #CHECK: vfeneb %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x81] #CHECK: vfeneb %v0, %v0, %v0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x81] @@ -1562,6 +2140,24 @@ vfenezh %v18, %v3, %v20 vfenezhs %v5, %v22, %v7 +#CHECK: vfi %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xc7] +#CHECK: vfi %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xc7] +#CHECK: vfi %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xc7] +#CHECK: vfi %v0, %v0, 0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x00,0xc7] +#CHECK: vfi %v0, %v0, 0, 12, 0 # encoding: [0xe7,0x00,0x00,0x0c,0x00,0xc7] +#CHECK: vfi %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xc7] +#CHECK: vfi %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xc7] +#CHECK: vfi %v14, %v17, 11, 4, 10 # encoding: [0xe7,0xe1,0x00,0xa4,0xb4,0xc7] + + vfi %v0, %v0, 0, 0, 0 + vfi %v0, %v0, 15, 0, 0 + vfi %v0, %v0, 0, 0, 15 + vfi %v0, %v0, 0, 4, 0 + vfi %v0, %v0, 0, 12, 0 + vfi %v0, %v31, 0, 0, 0 + vfi %v31, %v0, 0, 0, 0 + vfi %v14, %v17, 11, 4, 10 + #CHECK: vfidb %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xc7] #CHECK: vfidb %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x30,0xc7] #CHECK: vfidb %v0, %v0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x30,0xc7] @@ -1578,6 +2174,28 @@ vfidb %v31, %v0, 0, 0 vfidb %v14, %v17, 4, 10 +#CHECK: vistr %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x5c] +#CHECK: vistr %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x5c] +#CHECK: vistr %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x5c] +#CHECK: vistr %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x5c] +#CHECK: vistr %v0, %v0, 0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x5c] +#CHECK: vistr %v0, %v15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x5c] +#CHECK: vistr %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x5c] +#CHECK: vistr %v15, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x5c] +#CHECK: vistr %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x5c] +#CHECK: vistr %v18, %v3, 11, 9 # encoding: [0xe7,0x23,0x00,0x90,0xb8,0x5c] + + vistr %v0, %v0, 0 + vistr %v0, %v0, 15 + vistr %v0, %v0, 0, 0 + vistr %v0, %v0, 15, 0 + vistr %v0, %v0, 0, 12 + vistr %v0, %v15, 0 + vistr %v0, %v31, 0 + vistr %v15, %v0, 0 + vistr %v31, %v0, 0 + vistr %v18, %v3, 11, 9 + #CHECK: vistrb %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x5c] #CHECK: vistrb %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x5c] #CHECK: vistrb %v0, %v0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x5c] @@ -1638,6 +2256,41 @@ vistrh %v18, %v3 vistrhs %v5, %v22 +#CHECK: vfpso %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xcc] +#CHECK: vfpso %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xcc] +#CHECK: vfpso %v0, %v0, 0, 15, 0 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xcc] +#CHECK: vfpso %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xcc] +#CHECK: vfpso %v0, %v15, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xcc] +#CHECK: vfpso %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xcc] +#CHECK: vfpso %v15, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xcc] +#CHECK: vfpso %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xcc] +#CHECK: vfpso %v14, %v17, 11, 9, 7 # encoding: [0xe7,0xe1,0x00,0x79,0xb4,0xcc] + + vfpso %v0, %v0, 0, 0, 0 + vfpso %v0, %v0, 15, 0, 0 + vfpso %v0, %v0, 0, 15, 0 + vfpso %v0, %v0, 0, 0, 15 + vfpso %v0, %v15, 0, 0, 0 + vfpso %v0, %v31, 0, 0, 0 + vfpso %v15, %v0, 0, 0, 0 + vfpso %v31, %v0, 0, 0, 0 + vfpso %v14, %v17, 11, 9, 7 + +#CHECK: vfpsodb %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x30,0xcc] +#CHECK: vfpsodb %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x30,0xcc] +#CHECK: vfpsodb %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xcc] +#CHECK: vfpsodb %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x30,0xcc] +#CHECK: vfpsodb %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x38,0xcc] +#CHECK: vfpsodb %v14, %v17, 7 # encoding: [0xe7,0xe1,0x00,0x70,0x34,0xcc] + + vfpsodb %v0, %v0, 0 + vfpsodb %v0, %v0, 15 + vfpsodb %v0, %v15, 0 + vfpsodb %v0, %v31, 0 + vfpsodb %v15, %v0, 0 + vfpsodb %v31, %v0, 0 + vfpsodb %v14, %v17, 7 + #CHECK: vflcdb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xcc] #CHECK: vflcdb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x30,0xcc] #CHECK: vflcdb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xcc] @@ -1680,6 +2333,24 @@ vflpdb %v31, %v0 vflpdb %v14, %v17 +#CHECK: vfma %v0, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x8f] +#CHECK: vfma %v0, %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0x8f] +#CHECK: vfma %v0, %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0x8f] +#CHECK: vfma %v0, %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0x8f] +#CHECK: vfma %v0, %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x8f] +#CHECK: vfma %v0, %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x8f] +#CHECK: vfma %v31, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x8f] +#CHECK: vfma %v13, %v17, %v21, %v25, 9, 11 # encoding: [0xe7,0xd1,0x5b,0x09,0x97,0x8f] + + vfma %v0, %v0, %v0, %v0, 0, 0 + vfma %v0, %v0, %v0, %v0, 0, 15 + vfma %v0, %v0, %v0, %v0, 15, 0 + vfma %v0, %v0, %v0, %v31, 0, 0 + vfma %v0, %v0, %v31, %v0, 0, 0 + vfma %v0, %v31, %v0, %v0, 0, 0 + vfma %v31, %v0, %v0, %v0, 0, 0 + vfma %v13, %v17, %v21, %v25, 9, 11 + #CHECK: vfmadb %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x03,0x00,0x00,0x8f] #CHECK: vfmadb %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x03,0x00,0xf1,0x8f] #CHECK: vfmadb %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf3,0x00,0x02,0x8f] @@ -1694,6 +2365,22 @@ vfmadb %v31, %v0, %v0, %v0 vfmadb %v13, %v17, %v21, %v25 +#CHECK: vfm %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xe7] +#CHECK: vfm %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xe7] +#CHECK: vfm %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xe7] +#CHECK: vfm %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xe7] +#CHECK: vfm %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xe7] +#CHECK: vfm %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xe7] +#CHECK: vfm %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x09,0xba,0xe7] + + vfm %v0, %v0, %v0, 0, 0 + vfm %v0, %v0, %v0, 15, 0 + vfm %v0, %v0, %v0, 0, 15 + vfm %v0, %v0, %v31, 0, 0 + vfm %v0, %v31, %v0, 0, 0 + vfm %v31, %v0, %v0, 0, 0 + vfm %v18, %v3, %v20, 11, 9 + #CHECK: vfmdb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xe7] #CHECK: vfmdb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x32,0xe7] #CHECK: vfmdb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xe7] @@ -1706,6 +2393,24 @@ vfmdb %v31, %v0, %v0 vfmdb %v18, %v3, %v20 +#CHECK: vfms %v0, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x8e] +#CHECK: vfms %v0, %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0x8e] +#CHECK: vfms %v0, %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0x8e] +#CHECK: vfms %v0, %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0x8e] +#CHECK: vfms %v0, %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x8e] +#CHECK: vfms %v0, %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x8e] +#CHECK: vfms %v31, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x8e] +#CHECK: vfms %v13, %v17, %v21, %v25, 9, 11 # encoding: [0xe7,0xd1,0x5b,0x09,0x97,0x8e] + + vfms %v0, %v0, %v0, %v0, 0, 0 + vfms %v0, %v0, %v0, %v0, 0, 15 + vfms %v0, %v0, %v0, %v0, 15, 0 + vfms %v0, %v0, %v0, %v31, 0, 0 + vfms %v0, %v0, %v31, %v0, 0, 0 + vfms %v0, %v31, %v0, %v0, 0, 0 + vfms %v31, %v0, %v0, %v0, 0, 0 + vfms %v13, %v17, %v21, %v25, 9, 11 + #CHECK: vfmsdb %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x03,0x00,0x00,0x8e] #CHECK: vfmsdb %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x03,0x00,0xf1,0x8e] #CHECK: vfmsdb %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf3,0x00,0x02,0x8e] @@ -1720,6 +2425,22 @@ vfmsdb %v31, %v0, %v0, %v0 vfmsdb %v13, %v17, %v21, %v25 +#CHECK: vfs %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xe2] +#CHECK: vfs %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xe2] +#CHECK: vfs %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xe2] +#CHECK: vfs %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xe2] +#CHECK: vfs %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xe2] +#CHECK: vfs %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xe2] +#CHECK: vfs %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x09,0xba,0xe2] + + vfs %v0, %v0, %v0, 0, 0 + vfs %v0, %v0, %v0, 15, 0 + vfs %v0, %v0, %v0, 0, 15 + vfs %v0, %v0, %v31, 0, 0 + vfs %v0, %v31, %v0, 0, 0 + vfs %v31, %v0, %v0, 0, 0 + vfs %v18, %v3, %v20, 11, 9 + #CHECK: vfsdb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xe2] #CHECK: vfsdb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x32,0xe2] #CHECK: vfsdb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xe2] @@ -1732,6 +2453,24 @@ vfsdb %v31, %v0, %v0 vfsdb %v18, %v3, %v20 +#CHECK: vfsq %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xce] +#CHECK: vfsq %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xce] +#CHECK: vfsq %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xce] +#CHECK: vfsq %v0, %v15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xce] +#CHECK: vfsq %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xce] +#CHECK: vfsq %v15, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xce] +#CHECK: vfsq %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xce] +#CHECK: vfsq %v14, %v17, 11, 9 # encoding: [0xe7,0xe1,0x00,0x09,0xb4,0xce] + + vfsq %v0, %v0, 0, 0 + vfsq %v0, %v0, 15, 0 + vfsq %v0, %v0, 0, 15 + vfsq %v0, %v15, 0, 0 + vfsq %v0, %v31, 0, 0 + vfsq %v15, %v0, 0, 0 + vfsq %v31, %v0, 0, 0 + vfsq %v14, %v17, 11, 9 + #CHECK: vfsqdb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xce] #CHECK: vfsqdb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x30,0xce] #CHECK: vfsqdb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x34,0xce] @@ -1746,6 +2485,26 @@ vfsqdb %v31, %v0 vfsqdb %v14, %v17 +#CHECK: vftci %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x4a] +#CHECK: vftci %v0, %v0, 0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x4a] +#CHECK: vftci %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0x4a] +#CHECK: vftci %v0, %v0, 4095, 0, 0 # encoding: [0xe7,0x00,0xff,0xf0,0x00,0x4a] +#CHECK: vftci %v0, %v15, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x4a] +#CHECK: vftci %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x4a] +#CHECK: vftci %v15, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x4a] +#CHECK: vftci %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x4a] +#CHECK: vftci %v4, %v21, 1656, 11, 9 # encoding: [0xe7,0x45,0x67,0x89,0xb4,0x4a] + + vftci %v0, %v0, 0, 0, 0 + vftci %v0, %v0, 0, 15, 0 + vftci %v0, %v0, 0, 0, 15 + vftci %v0, %v0, 4095, 0, 0 + vftci %v0, %v15, 0, 0, 0 + vftci %v0, %v31, 0, 0, 0 + vftci %v15, %v0, 0, 0, 0 + vftci %v31, %v0, 0, 0, 0 + vftci %v4, %v21, 0x678, 11, 9 + #CHECK: vftcidb %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0x4a] #CHECK: vftcidb %v0, %v0, 4095 # encoding: [0xe7,0x00,0xff,0xf0,0x30,0x4a] #CHECK: vftcidb %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x30,0x4a] @@ -1818,6 +2577,22 @@ vgeg %v31, 0(%v0,%r1), 0 vgeg %v10, 1000(%v19,%r7), 1 +#CHECK: vgfma %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xbc] +#CHECK: vgfma %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xbc] +#CHECK: vgfma %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xbc] +#CHECK: vgfma %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xbc] +#CHECK: vgfma %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xbc] +#CHECK: vgfma %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xbc] +#CHECK: vgfma %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xbc] + + vgfma %v0, %v0, %v0, %v0, 0 + vgfma %v0, %v0, %v0, %v0, 15 + vgfma %v0, %v0, %v0, %v31, 0 + vgfma %v0, %v0, %v31, %v0, 0 + vgfma %v0, %v31, %v0, %v0, 0 + vgfma %v31, %v0, %v0, %v0, 0 + vgfma %v13, %v17, %v21, %v25, 11 + #CHECK: vgfmab %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xbc] #CHECK: vgfmab %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xbc] #CHECK: vgfmab %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xbc] @@ -1874,6 +2649,20 @@ vgfmah %v31, %v0, %v0, %v0 vgfmah %v13, %v17, %v21, %v25 +#CHECK: vgfm %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xb4] +#CHECK: vgfm %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xb4] +#CHECK: vgfm %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xb4] +#CHECK: vgfm %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xb4] +#CHECK: vgfm %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xb4] +#CHECK: vgfm %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xb4] + + vgfm %v0, %v0, %v0, 0 + vgfm %v0, %v0, %v0, 15 + vgfm %v0, %v0, %v31, 0 + vgfm %v0, %v31, %v0, 0 + vgfm %v31, %v0, %v0, 0 + vgfm %v18, %v3, %v20, 11 + #CHECK: vgfmb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xb4] #CHECK: vgfmb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xb4] #CHECK: vgfmb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xb4] @@ -1922,6 +2711,22 @@ vgfmh %v31, %v0, %v0 vgfmh %v18, %v3, %v20 +#CHECK: vgm %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x46] +#CHECK: vgm %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x46] +#CHECK: vgm %v0, 0, 255, 0 # encoding: [0xe7,0x00,0x00,0xff,0x00,0x46] +#CHECK: vgm %v0, 255, 0, 0 # encoding: [0xe7,0x00,0xff,0x00,0x00,0x46] +#CHECK: vgm %v15, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x46] +#CHECK: vgm %v31, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x46] +#CHECK: vgm %v21, 2, 3, 11 # encoding: [0xe7,0x50,0x02,0x03,0xb8,0x46] + + vgm %v0, 0, 0, 0 + vgm %v0, 0, 0, 15 + vgm %v0, 0, 255, 0 + vgm %v0, 255, 0, 0 + vgm %v15, 0, 0, 0 + vgm %v31, 0, 0, 0 + vgm %v21, 2, 3, 11 + #CHECK: vgmb %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x46] #CHECK: vgmb %v0, 0, 255 # encoding: [0xe7,0x00,0x00,0xff,0x00,0x46] #CHECK: vgmb %v0, 255, 0 # encoding: [0xe7,0x00,0xff,0x00,0x00,0x46] @@ -2012,6 +2817,22 @@ vlbb %v31, 0, 0 vlbb %v18, 1383(%r3,%r4), 8 +#CHECK: vlc %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xde] +#CHECK: vlc %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xde] +#CHECK: vlc %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xde] +#CHECK: vlc %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xde] +#CHECK: vlc %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xde] +#CHECK: vlc %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xde] +#CHECK: vlc %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xde] + + vlc %v0, %v0, 0 + vlc %v0, %v0, 15 + vlc %v0, %v15, 0 + vlc %v0, %v31, 0 + vlc %v15, %v0, 0 + vlc %v31, %v0, 0 + vlc %v14, %v17, 11 + #CHECK: vlcb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xde] #CHECK: vlcb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xde] #CHECK: vlcb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xde] @@ -2068,6 +2889,24 @@ vlch %v31, %v0 vlch %v14, %v17 +#CHECK: vlde %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xc4] +#CHECK: vlde %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xc4] +#CHECK: vlde %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xc4] +#CHECK: vlde %v0, %v15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xc4] +#CHECK: vlde %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xc4] +#CHECK: vlde %v15, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xc4] +#CHECK: vlde %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xc4] +#CHECK: vlde %v14, %v17, 11, 9 # encoding: [0xe7,0xe1,0x00,0x09,0xb4,0xc4] + + vlde %v0, %v0, 0, 0 + vlde %v0, %v0, 15, 0 + vlde %v0, %v0, 0, 15 + vlde %v0, %v15, 0, 0 + vlde %v0, %v31, 0, 0 + vlde %v15, %v0, 0, 0 + vlde %v31, %v0, 0, 0 + vlde %v14, %v17, 11, 9 + #CHECK: vldeb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x20,0xc4] #CHECK: vldeb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x20,0xc4] #CHECK: vldeb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x24,0xc4] @@ -2100,6 +2939,24 @@ vleb %v31, 0, 0 vleb %v18, 1383(%r3,%r4), 8 +#CHECK: vled %v0, %v0, 0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xc5] +#CHECK: vled %v0, %v0, 15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xc5] +#CHECK: vled %v0, %v0, 0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0xc5] +#CHECK: vled %v0, %v0, 0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x00,0xc5] +#CHECK: vled %v0, %v0, 0, 12, 0 # encoding: [0xe7,0x00,0x00,0x0c,0x00,0xc5] +#CHECK: vled %v0, %v31, 0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xc5] +#CHECK: vled %v31, %v0, 0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xc5] +#CHECK: vled %v14, %v17, 11, 4, 10 # encoding: [0xe7,0xe1,0x00,0xa4,0xb4,0xc5] + + vled %v0, %v0, 0, 0, 0 + vled %v0, %v0, 15, 0, 0 + vled %v0, %v0, 0, 0, 15 + vled %v0, %v0, 0, 4, 0 + vled %v0, %v0, 0, 12, 0 + vled %v0, %v31, 0, 0, 0 + vled %v31, %v0, 0, 0, 0 + vled %v14, %v17, 11, 4, 10 + #CHECK: vledb %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xc5] #CHECK: vledb %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x30,0xc5] #CHECK: vledb %v0, %v0, 4, 0 # encoding: [0xe7,0x00,0x00,0x04,0x30,0xc5] @@ -2234,6 +3091,24 @@ vleih %v31, 0, 0 vleih %v18, 0x3456, 7 +#CHECK: vlgv %r0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x21] +#CHECK: vlgv %r0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x21] +#CHECK: vlgv %r0, %v0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x21] +#CHECK: vlgv %r0, %v0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x21] +#CHECK: vlgv %r0, %v15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x21] +#CHECK: vlgv %r0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x21] +#CHECK: vlgv %r15, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x21] +#CHECK: vlgv %r2, %v19, 1383(%r4), 11 # encoding: [0xe7,0x23,0x45,0x67,0xb4,0x21] + + vlgv %r0, %v0, 0, 0 + vlgv %r0, %v0, 0, 15 + vlgv %r0, %v0, 4095, 0 + vlgv %r0, %v0, 0(%r15), 0 + vlgv %r0, %v15, 0, 0 + vlgv %r0, %v31, 0, 0 + vlgv %r15, %v0, 0, 0 + vlgv %r2, %v19, 1383(%r4), 11 + #CHECK: vlgvb %r0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x21] #CHECK: vlgvb %r0, %v0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x21] #CHECK: vlgvb %r0, %v0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x21] @@ -2314,6 +3189,24 @@ vll %v31, %r0, 0 vll %v18, %r3, 1383(%r4) +#CHECK: vllez %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x04] +#CHECK: vllez %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x04] +#CHECK: vllez %v0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x04] +#CHECK: vllez %v0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x04] +#CHECK: vllez %v0, 0(%r15,%r1), 0 # encoding: [0xe7,0x0f,0x10,0x00,0x00,0x04] +#CHECK: vllez %v15, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x04] +#CHECK: vllez %v31, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x04] +#CHECK: vllez %v18, 1383(%r3,%r4), 11 # encoding: [0xe7,0x23,0x45,0x67,0xb8,0x04] + + vllez %v0, 0, 0 + vllez %v0, 0, 15 + vllez %v0, 4095, 0 + vllez %v0, 0(%r15), 0 + vllez %v0, 0(%r15,%r1), 0 + vllez %v15, 0, 0 + vllez %v31, 0, 0 + vllez %v18, 0x567(%r3,%r4), 11 + #CHECK: vllezb %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x04] #CHECK: vllezb %v0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x04] #CHECK: vllezb %v0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x04] @@ -2392,6 +3285,22 @@ vlm %v31, %v0, 0 vlm %v14, %v17, 1074(%r5) +#CHECK: vlp %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xdf] +#CHECK: vlp %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xdf] +#CHECK: vlp %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xdf] +#CHECK: vlp %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xdf] +#CHECK: vlp %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xdf] +#CHECK: vlp %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xdf] +#CHECK: vlp %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xdf] + + vlp %v0, %v0, 0 + vlp %v0, %v0, 15 + vlp %v0, %v15, 0 + vlp %v0, %v31, 0 + vlp %v15, %v0, 0 + vlp %v31, %v0, 0 + vlp %v14, %v17, 11 + #CHECK: vlpb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xdf] #CHECK: vlpb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xdf] #CHECK: vlpb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xdf] @@ -2462,6 +3371,24 @@ vlr %v31, %v0 vlr %v14, %v17 +#CHECK: vlrep %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x05] +#CHECK: vlrep %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x05] +#CHECK: vlrep %v0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x05] +#CHECK: vlrep %v0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x05] +#CHECK: vlrep %v0, 0(%r15,%r1), 0 # encoding: [0xe7,0x0f,0x10,0x00,0x00,0x05] +#CHECK: vlrep %v15, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x05] +#CHECK: vlrep %v31, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x05] +#CHECK: vlrep %v18, 1383(%r3,%r4), 11 # encoding: [0xe7,0x23,0x45,0x67,0xb8,0x05] + + vlrep %v0, 0, 0 + vlrep %v0, 0, 15 + vlrep %v0, 4095, 0 + vlrep %v0, 0(%r15), 0 + vlrep %v0, 0(%r15,%r1), 0 + vlrep %v15, 0, 0 + vlrep %v31, 0, 0 + vlrep %v18, 0x567(%r3,%r4), 11 + #CHECK: vlrepb %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x05] #CHECK: vlrepb %v0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x05] #CHECK: vlrepb %v0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x05] @@ -2526,6 +3453,24 @@ vlreph %v31, 0 vlreph %v18, 0x567(%r3,%r4) +#CHECK: vlvg %v0, %r0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x22] +#CHECK: vlvg %v0, %r0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x22] +#CHECK: vlvg %v0, %r0, 4095, 0 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x22] +#CHECK: vlvg %v0, %r0, 0(%r15), 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x22] +#CHECK: vlvg %v0, %r15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x22] +#CHECK: vlvg %v15, %r0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x22] +#CHECK: vlvg %v31, %r0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x22] +#CHECK: vlvg %v18, %r3, 1383(%r4), 11 # encoding: [0xe7,0x23,0x45,0x67,0xb8,0x22] + + vlvg %v0, %r0, 0, 0 + vlvg %v0, %r0, 0, 15 + vlvg %v0, %r0, 4095, 0 + vlvg %v0, %r0, 0(%r15), 0 + vlvg %v0, %r15, 0, 0 + vlvg %v15, %r0, 0, 0 + vlvg %v31, %r0, 0, 0 + vlvg %v18, %r3, 1383(%r4), 11 + #CHECK: vlvgb %v0, %r0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x22] #CHECK: vlvgb %v0, %r0, 4095 # encoding: [0xe7,0x00,0x0f,0xff,0x00,0x22] #CHECK: vlvgb %v0, %r0, 0(%r15) # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x22] @@ -2604,6 +3549,22 @@ vlvgp %v31, %r0, %r0 vlvgp %v18, %r3, %r4 +#CHECK: vmae %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xae] +#CHECK: vmae %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xae] +#CHECK: vmae %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xae] +#CHECK: vmae %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xae] +#CHECK: vmae %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xae] +#CHECK: vmae %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xae] +#CHECK: vmae %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xae] + + vmae %v0, %v0, %v0, %v0, 0 + vmae %v0, %v0, %v0, %v0, 15 + vmae %v0, %v0, %v0, %v31, 0 + vmae %v0, %v0, %v31, %v0, 0 + vmae %v0, %v31, %v0, %v0, 0 + vmae %v31, %v0, %v0, %v0, 0 + vmae %v13, %v17, %v21, %v25, 11 + #CHECK: vmaeb %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xae] #CHECK: vmaeb %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xae] #CHECK: vmaeb %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xae] @@ -2646,6 +3607,22 @@ vmaeh %v31, %v0, %v0, %v0 vmaeh %v13, %v17, %v21, %v25 +#CHECK: vmah %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xab] +#CHECK: vmah %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xab] +#CHECK: vmah %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xab] +#CHECK: vmah %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xab] +#CHECK: vmah %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xab] +#CHECK: vmah %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xab] +#CHECK: vmah %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xab] + + vmah %v0, %v0, %v0, %v0, 0 + vmah %v0, %v0, %v0, %v0, 15 + vmah %v0, %v0, %v0, %v31, 0 + vmah %v0, %v0, %v31, %v0, 0 + vmah %v0, %v31, %v0, %v0, 0 + vmah %v31, %v0, %v0, %v0, 0 + vmah %v13, %v17, %v21, %v25, 11 + #CHECK: vmahb %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xab] #CHECK: vmahb %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xab] #CHECK: vmahb %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xab] @@ -2688,6 +3665,22 @@ vmahh %v31, %v0, %v0, %v0 vmahh %v13, %v17, %v21, %v25 +#CHECK: vmal %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xaa] +#CHECK: vmal %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xaa] +#CHECK: vmal %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xaa] +#CHECK: vmal %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xaa] +#CHECK: vmal %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xaa] +#CHECK: vmal %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xaa] +#CHECK: vmal %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xaa] + + vmal %v0, %v0, %v0, %v0, 0 + vmal %v0, %v0, %v0, %v0, 15 + vmal %v0, %v0, %v0, %v31, 0 + vmal %v0, %v0, %v31, %v0, 0 + vmal %v0, %v31, %v0, %v0, 0 + vmal %v31, %v0, %v0, %v0, 0 + vmal %v13, %v17, %v21, %v25, 11 + #CHECK: vmalb %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xaa] #CHECK: vmalb %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xaa] #CHECK: vmalb %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xaa] @@ -2702,6 +3695,22 @@ vmalb %v31, %v0, %v0, %v0 vmalb %v13, %v17, %v21, %v25 +#CHECK: vmale %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xac] +#CHECK: vmale %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xac] +#CHECK: vmale %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xac] +#CHECK: vmale %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xac] +#CHECK: vmale %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xac] +#CHECK: vmale %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xac] +#CHECK: vmale %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xac] + + vmale %v0, %v0, %v0, %v0, 0 + vmale %v0, %v0, %v0, %v0, 15 + vmale %v0, %v0, %v0, %v31, 0 + vmale %v0, %v0, %v31, %v0, 0 + vmale %v0, %v31, %v0, %v0, 0 + vmale %v31, %v0, %v0, %v0, 0 + vmale %v13, %v17, %v21, %v25, 11 + #CHECK: vmaleb %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xac] #CHECK: vmaleb %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xac] #CHECK: vmaleb %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xac] @@ -2758,6 +3767,22 @@ vmalf %v31, %v0, %v0, %v0 vmalf %v13, %v17, %v21, %v25 +#CHECK: vmalh %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa9] +#CHECK: vmalh %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xa9] +#CHECK: vmalh %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xa9] +#CHECK: vmalh %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa9] +#CHECK: vmalh %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa9] +#CHECK: vmalh %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa9] +#CHECK: vmalh %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xa9] + + vmalh %v0, %v0, %v0, %v0, 0 + vmalh %v0, %v0, %v0, %v0, 15 + vmalh %v0, %v0, %v0, %v31, 0 + vmalh %v0, %v0, %v31, %v0, 0 + vmalh %v0, %v31, %v0, %v0, 0 + vmalh %v31, %v0, %v0, %v0, 0 + vmalh %v13, %v17, %v21, %v25, 11 + #CHECK: vmalhb %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa9] #CHECK: vmalhb %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xa9] #CHECK: vmalhb %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa9] @@ -2814,6 +3839,22 @@ vmalhw %v31, %v0, %v0, %v0 vmalhw %v13, %v17, %v21, %v25 +#CHECK: vmalo %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xad] +#CHECK: vmalo %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xad] +#CHECK: vmalo %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xad] +#CHECK: vmalo %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xad] +#CHECK: vmalo %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xad] +#CHECK: vmalo %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xad] +#CHECK: vmalo %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xad] + + vmalo %v0, %v0, %v0, %v0, 0 + vmalo %v0, %v0, %v0, %v0, 15 + vmalo %v0, %v0, %v0, %v31, 0 + vmalo %v0, %v0, %v31, %v0, 0 + vmalo %v0, %v31, %v0, %v0, 0 + vmalo %v31, %v0, %v0, %v0, 0 + vmalo %v13, %v17, %v21, %v25, 11 + #CHECK: vmalob %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xad] #CHECK: vmalob %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xad] #CHECK: vmalob %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xad] @@ -2856,6 +3897,22 @@ vmaloh %v31, %v0, %v0, %v0 vmaloh %v13, %v17, %v21, %v25 +#CHECK: vmao %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xaf] +#CHECK: vmao %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xaf] +#CHECK: vmao %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xaf] +#CHECK: vmao %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xaf] +#CHECK: vmao %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xaf] +#CHECK: vmao %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xaf] +#CHECK: vmao %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xaf] + + vmao %v0, %v0, %v0, %v0, 0 + vmao %v0, %v0, %v0, %v0, 15 + vmao %v0, %v0, %v0, %v31, 0 + vmao %v0, %v0, %v31, %v0, 0 + vmao %v0, %v31, %v0, %v0, 0 + vmao %v31, %v0, %v0, %v0, 0 + vmao %v13, %v17, %v21, %v25, 11 + #CHECK: vmaob %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xaf] #CHECK: vmaob %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xaf] #CHECK: vmaob %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xaf] @@ -2898,6 +3955,20 @@ vmaoh %v31, %v0, %v0, %v0 vmaoh %v13, %v17, %v21, %v25 +#CHECK: vme %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa6] +#CHECK: vme %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xa6] +#CHECK: vme %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa6] +#CHECK: vme %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa6] +#CHECK: vme %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa6] +#CHECK: vme %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xa6] + + vme %v0, %v0, %v0, 0 + vme %v0, %v0, %v0, 15 + vme %v0, %v0, %v31, 0 + vme %v0, %v31, %v0, 0 + vme %v31, %v0, %v0, 0 + vme %v18, %v3, %v20, 11 + #CHECK: vmeb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa6] #CHECK: vmeb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa6] #CHECK: vmeb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa6] @@ -2934,6 +4005,20 @@ vmeh %v31, %v0, %v0 vmeh %v18, %v3, %v20 +#CHECK: vmh %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa3] +#CHECK: vmh %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xa3] +#CHECK: vmh %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa3] +#CHECK: vmh %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa3] +#CHECK: vmh %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa3] +#CHECK: vmh %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xa3] + + vmh %v0, %v0, %v0, 0 + vmh %v0, %v0, %v0, 15 + vmh %v0, %v0, %v31, 0 + vmh %v0, %v31, %v0, 0 + vmh %v31, %v0, %v0, 0 + vmh %v18, %v3, %v20, 11 + #CHECK: vmhb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa3] #CHECK: vmhb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa3] #CHECK: vmhb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa3] @@ -2970,6 +4055,20 @@ vmhh %v31, %v0, %v0 vmhh %v18, %v3, %v20 +#CHECK: vml %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa2] +#CHECK: vml %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xa2] +#CHECK: vml %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa2] +#CHECK: vml %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa2] +#CHECK: vml %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa2] +#CHECK: vml %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xa2] + + vml %v0, %v0, %v0, 0 + vml %v0, %v0, %v0, 15 + vml %v0, %v0, %v31, 0 + vml %v0, %v31, %v0, 0 + vml %v31, %v0, %v0, 0 + vml %v18, %v3, %v20, 11 + #CHECK: vmlb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa2] #CHECK: vmlb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa2] #CHECK: vmlb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa2] @@ -2982,6 +4081,20 @@ vmlb %v31, %v0, %v0 vmlb %v18, %v3, %v20 +#CHECK: vmle %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa4] +#CHECK: vmle %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xa4] +#CHECK: vmle %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa4] +#CHECK: vmle %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa4] +#CHECK: vmle %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa4] +#CHECK: vmle %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xa4] + + vmle %v0, %v0, %v0, 0 + vmle %v0, %v0, %v0, 15 + vmle %v0, %v0, %v31, 0 + vmle %v0, %v31, %v0, 0 + vmle %v31, %v0, %v0, 0 + vmle %v18, %v3, %v20, 11 + #CHECK: vmleb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa4] #CHECK: vmleb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa4] #CHECK: vmleb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa4] @@ -3030,6 +4143,20 @@ vmlf %v31, %v0, %v0 vmlf %v18, %v3, %v20 +#CHECK: vmlh %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa1] +#CHECK: vmlh %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xa1] +#CHECK: vmlh %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa1] +#CHECK: vmlh %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa1] +#CHECK: vmlh %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa1] +#CHECK: vmlh %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xa1] + + vmlh %v0, %v0, %v0, 0 + vmlh %v0, %v0, %v0, 15 + vmlh %v0, %v0, %v31, 0 + vmlh %v0, %v31, %v0, 0 + vmlh %v31, %v0, %v0, 0 + vmlh %v18, %v3, %v20, 11 + #CHECK: vmlhb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa1] #CHECK: vmlhb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa1] #CHECK: vmlhb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa1] @@ -3078,6 +4205,20 @@ vmlhw %v31, %v0, %v0 vmlhw %v18, %v3, %v20 +#CHECK: vmlo %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa5] +#CHECK: vmlo %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xa5] +#CHECK: vmlo %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa5] +#CHECK: vmlo %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa5] +#CHECK: vmlo %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa5] +#CHECK: vmlo %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xa5] + + vmlo %v0, %v0, %v0, 0 + vmlo %v0, %v0, %v0, 15 + vmlo %v0, %v0, %v31, 0 + vmlo %v0, %v31, %v0, 0 + vmlo %v31, %v0, %v0, 0 + vmlo %v18, %v3, %v20, 11 + #CHECK: vmlob %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa5] #CHECK: vmlob %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa5] #CHECK: vmlob %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa5] @@ -3114,6 +4255,20 @@ vmloh %v31, %v0, %v0 vmloh %v18, %v3, %v20 +#CHECK: vmn %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfe] +#CHECK: vmn %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xfe] +#CHECK: vmn %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfe] +#CHECK: vmn %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfe] +#CHECK: vmn %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xfe] +#CHECK: vmn %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xfe] + + vmn %v0, %v0, %v0, 0 + vmn %v0, %v0, %v0, 15 + vmn %v0, %v0, %v31, 0 + vmn %v0, %v31, %v0, 0 + vmn %v31, %v0, %v0, 0 + vmn %v18, %v3, %v20, 11 + #CHECK: vmnb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfe] #CHECK: vmnb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfe] #CHECK: vmnb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfe] @@ -3162,6 +4317,20 @@ vmnh %v31, %v0, %v0 vmnh %v18, %v3, %v20 +#CHECK: vmnl %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfc] +#CHECK: vmnl %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xfc] +#CHECK: vmnl %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfc] +#CHECK: vmnl %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfc] +#CHECK: vmnl %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xfc] +#CHECK: vmnl %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xfc] + + vmnl %v0, %v0, %v0, 0 + vmnl %v0, %v0, %v0, 15 + vmnl %v0, %v0, %v31, 0 + vmnl %v0, %v31, %v0, 0 + vmnl %v31, %v0, %v0, 0 + vmnl %v18, %v3, %v20, 11 + #CHECK: vmnlb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfc] #CHECK: vmnlb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfc] #CHECK: vmnlb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfc] @@ -3210,6 +4379,20 @@ vmnlh %v31, %v0, %v0 vmnlh %v18, %v3, %v20 +#CHECK: vmo %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa7] +#CHECK: vmo %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xa7] +#CHECK: vmo %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa7] +#CHECK: vmo %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa7] +#CHECK: vmo %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xa7] +#CHECK: vmo %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xa7] + + vmo %v0, %v0, %v0, 0 + vmo %v0, %v0, %v0, 15 + vmo %v0, %v0, %v31, 0 + vmo %v0, %v31, %v0, 0 + vmo %v31, %v0, %v0, 0 + vmo %v18, %v3, %v20, 11 + #CHECK: vmob %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xa7] #CHECK: vmob %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xa7] #CHECK: vmob %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xa7] @@ -3246,6 +4429,26 @@ vmoh %v31, %v0, %v0 vmoh %v18, %v3, %v20 +#CHECK: vmrh %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x61] +#CHECK: vmrh %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x61] +#CHECK: vmrh %v0, %v0, %v15, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x61] +#CHECK: vmrh %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x61] +#CHECK: vmrh %v0, %v15, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x61] +#CHECK: vmrh %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x61] +#CHECK: vmrh %v15, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x61] +#CHECK: vmrh %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x61] +#CHECK: vmrh %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x61] + + vmrh %v0, %v0, %v0, 0 + vmrh %v0, %v0, %v0, 15 + vmrh %v0, %v0, %v15, 0 + vmrh %v0, %v0, %v31, 0 + vmrh %v0, %v15, %v0, 0 + vmrh %v0, %v31, %v0, 0 + vmrh %v15, %v0, %v0, 0 + vmrh %v31, %v0, %v0, 0 + vmrh %v18, %v3, %v20, 11 + #CHECK: vmrhb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x61] #CHECK: vmrhb %v0, %v0, %v15 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x61] #CHECK: vmrhb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x61] @@ -3318,6 +4521,26 @@ vmrhh %v31, %v0, %v0 vmrhh %v18, %v3, %v20 +#CHECK: vmrl %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x60] +#CHECK: vmrl %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x60] +#CHECK: vmrl %v0, %v0, %v15, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x60] +#CHECK: vmrl %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x60] +#CHECK: vmrl %v0, %v15, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x60] +#CHECK: vmrl %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x60] +#CHECK: vmrl %v15, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x60] +#CHECK: vmrl %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x60] +#CHECK: vmrl %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x60] + + vmrl %v0, %v0, %v0, 0 + vmrl %v0, %v0, %v0, 15 + vmrl %v0, %v0, %v15, 0 + vmrl %v0, %v0, %v31, 0 + vmrl %v0, %v15, %v0, 0 + vmrl %v0, %v31, %v0, 0 + vmrl %v15, %v0, %v0, 0 + vmrl %v31, %v0, %v0, 0 + vmrl %v18, %v3, %v20, 11 + #CHECK: vmrlb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x60] #CHECK: vmrlb %v0, %v0, %v15 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x60] #CHECK: vmrlb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x60] @@ -3390,6 +4613,20 @@ vmrlh %v31, %v0, %v0 vmrlh %v18, %v3, %v20 +#CHECK: vmx %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xff] +#CHECK: vmx %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xff] +#CHECK: vmx %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xff] +#CHECK: vmx %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xff] +#CHECK: vmx %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xff] +#CHECK: vmx %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xff] + + vmx %v0, %v0, %v0, 0 + vmx %v0, %v0, %v0, 15 + vmx %v0, %v0, %v31, 0 + vmx %v0, %v31, %v0, 0 + vmx %v31, %v0, %v0, 0 + vmx %v18, %v3, %v20, 11 + #CHECK: vmxb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xff] #CHECK: vmxb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xff] #CHECK: vmxb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xff] @@ -3438,6 +4675,20 @@ vmxh %v31, %v0, %v0 vmxh %v18, %v3, %v20 +#CHECK: vmxl %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfd] +#CHECK: vmxl %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xfd] +#CHECK: vmxl %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfd] +#CHECK: vmxl %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfd] +#CHECK: vmxl %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xfd] +#CHECK: vmxl %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xfd] + + vmxl %v0, %v0, %v0, 0 + vmxl %v0, %v0, %v0, 15 + vmxl %v0, %v0, %v31, 0 + vmxl %v0, %v31, %v0, 0 + vmxl %v31, %v0, %v0, 0 + vmxl %v18, %v3, %v20, 11 + #CHECK: vmxlb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xfd] #CHECK: vmxlb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xfd] #CHECK: vmxlb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xfd] @@ -3522,6 +4773,16 @@ vno %v31, %v0, %v0 vno %v18, %v3, %v20 +#CHECK: vno %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x6b] +#CHECK: vno %v0, %v31, %v31 # encoding: [0xe7,0x0f,0xf0,0x00,0x06,0x6b] +#CHECK: vno %v31, %v0, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x6b] +#CHECK: vno %v3, %v20, %v20 # encoding: [0xe7,0x34,0x40,0x00,0x06,0x6b] + + vnot %v0, %v0 + vnot %v0, %v31 + vnot %v31, %v0 + vnot %v3, %v20 + #CHECK: vo %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x6a] #CHECK: vo %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x6a] #CHECK: vo %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x6a] @@ -3572,6 +4833,26 @@ vperm %v31, %v0, %v0, %v0 vperm %v13, %v17, %v21, %v25 +#CHECK: vpk %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x94] +#CHECK: vpk %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x94] +#CHECK: vpk %v0, %v0, %v15, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x94] +#CHECK: vpk %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x94] +#CHECK: vpk %v0, %v15, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x94] +#CHECK: vpk %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x94] +#CHECK: vpk %v15, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x94] +#CHECK: vpk %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x94] +#CHECK: vpk %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x94] + + vpk %v0, %v0, %v0, 0 + vpk %v0, %v0, %v0, 15 + vpk %v0, %v0, %v15, 0 + vpk %v0, %v0, %v31, 0 + vpk %v0, %v15, %v0, 0 + vpk %v0, %v31, %v0, 0 + vpk %v15, %v0, %v0, 0 + vpk %v31, %v0, %v0, 0 + vpk %v18, %v3, %v20, 11 + #CHECK: vpkf %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x20,0x94] #CHECK: vpkf %v0, %v0, %v15 # encoding: [0xe7,0x00,0xf0,0x00,0x20,0x94] #CHECK: vpkf %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x22,0x94] @@ -3626,6 +4907,28 @@ vpkh %v31, %v0, %v0 vpkh %v18, %v3, %v20 +#CHECK: vpkls %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x95] +#CHECK: vpkls %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x95] +#CHECK: vpkls %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0x95] +#CHECK: vpkls %v0, %v0, %v15, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x95] +#CHECK: vpkls %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x95] +#CHECK: vpkls %v0, %v15, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x95] +#CHECK: vpkls %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x95] +#CHECK: vpkls %v15, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x95] +#CHECK: vpkls %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x95] +#CHECK: vpkls %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x90,0xba,0x95] + + vpkls %v0, %v0, %v0, 0, 0 + vpkls %v0, %v0, %v0, 15, 0 + vpkls %v0, %v0, %v0, 0, 15 + vpkls %v0, %v0, %v15, 0, 0 + vpkls %v0, %v0, %v31, 0, 0 + vpkls %v0, %v15, %v0, 0, 0 + vpkls %v0, %v31, %v0, 0, 0 + vpkls %v15, %v0, %v0, 0, 0 + vpkls %v31, %v0, %v0, 0, 0 + vpkls %v18, %v3, %v20, 11, 9 + #CHECK: vpklsf %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x20,0x95] #CHECK: vpklsf %v0, %v0, %v15 # encoding: [0xe7,0x00,0xf0,0x00,0x20,0x95] #CHECK: vpklsf %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x22,0x95] @@ -3686,6 +4989,28 @@ vpklsh %v18, %v3, %v20 vpklshs %v5, %v22, %v7 +#CHECK: vpks %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x97] +#CHECK: vpks %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x97] +#CHECK: vpks %v0, %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0xf0,0x00,0x97] +#CHECK: vpks %v0, %v0, %v15, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x97] +#CHECK: vpks %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x97] +#CHECK: vpks %v0, %v15, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x97] +#CHECK: vpks %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x97] +#CHECK: vpks %v15, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x97] +#CHECK: vpks %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x97] +#CHECK: vpks %v18, %v3, %v20, 11, 9 # encoding: [0xe7,0x23,0x40,0x90,0xba,0x97] + + vpks %v0, %v0, %v0, 0, 0 + vpks %v0, %v0, %v0, 15, 0 + vpks %v0, %v0, %v0, 0, 15 + vpks %v0, %v0, %v15, 0, 0 + vpks %v0, %v0, %v31, 0, 0 + vpks %v0, %v15, %v0, 0, 0 + vpks %v0, %v31, %v0, 0, 0 + vpks %v15, %v0, %v0, 0, 0 + vpks %v31, %v0, %v0, 0, 0 + vpks %v18, %v3, %v20, 11, 9 + #CHECK: vpksf %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x20,0x97] #CHECK: vpksf %v0, %v0, %v15 # encoding: [0xe7,0x00,0xf0,0x00,0x20,0x97] #CHECK: vpksf %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x22,0x97] @@ -3760,6 +5085,24 @@ vpopct %v31, %v0, 0 vpopct %v14, %v17, 0 +#CHECK: vrep %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x4d] +#CHECK: vrep %v0, %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x4d] +#CHECK: vrep %v0, %v0, 65535, 0 # encoding: [0xe7,0x00,0xff,0xff,0x00,0x4d] +#CHECK: vrep %v0, %v15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x4d] +#CHECK: vrep %v0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x4d] +#CHECK: vrep %v15, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x4d] +#CHECK: vrep %v31, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x4d] +#CHECK: vrep %v4, %v21, 26505, 11 # encoding: [0xe7,0x45,0x67,0x89,0xb4,0x4d] + + vrep %v0, %v0, 0, 0 + vrep %v0, %v0, 0, 15 + vrep %v0, %v0, 65535, 0 + vrep %v0, %v15, 0, 0 + vrep %v0, %v31, 0, 0 + vrep %v15, %v0, 0, 0 + vrep %v31, %v0, 0, 0 + vrep %v4, %v21, 0x6789, 11 + #CHECK: vrepb %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x4d] #CHECK: vrepb %v0, %v0, 65535 # encoding: [0xe7,0x00,0xff,0xff,0x00,0x4d] #CHECK: vrepb %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x4d] @@ -3824,6 +5167,22 @@ vreph %v31, %v0, 0 vreph %v4, %v21, 0x6789 +#CHECK: vrepi %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x45] +#CHECK: vrepi %v0, 0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x45] +#CHECK: vrepi %v0, -32768, 0 # encoding: [0xe7,0x00,0x80,0x00,0x00,0x45] +#CHECK: vrepi %v0, 32767, 0 # encoding: [0xe7,0x00,0x7f,0xff,0x00,0x45] +#CHECK: vrepi %v15, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x45] +#CHECK: vrepi %v31, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x45] +#CHECK: vrepi %v18, 13398, 11 # encoding: [0xe7,0x20,0x34,0x56,0xb8,0x45] + + vrepi %v0, 0, 0 + vrepi %v0, 0, 15 + vrepi %v0, -32768, 0 + vrepi %v0, 32767, 0 + vrepi %v15, 0, 0 + vrepi %v31, 0, 0 + vrepi %v18, 0x3456, 11 + #CHECK: vrepib %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x45] #CHECK: vrepib %v0, -32768 # encoding: [0xe7,0x00,0x80,0x00,0x00,0x45] #CHECK: vrepib %v0, 32767 # encoding: [0xe7,0x00,0x7f,0xff,0x00,0x45] @@ -3880,6 +5239,20 @@ vrepih %v31, 0 vrepih %v18, 0x3456 +#CHECK: vs %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf7] +#CHECK: vs %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf7] +#CHECK: vs %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf7] +#CHECK: vs %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf7] +#CHECK: vs %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf7] +#CHECK: vs %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xf7] + + vs %v0, %v0, %v0, 0 + vs %v0, %v0, %v0, 15 + vs %v0, %v0, %v31, 0 + vs %v0, %v31, %v0, 0 + vs %v31, %v0, %v0, 0 + vs %v18, %v3, %v20, 11 + #CHECK: vsb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf7] #CHECK: vsb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf7] #CHECK: vsb %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf7] @@ -3892,6 +5265,22 @@ vsb %v31, %v0, %v0 vsb %v18, %v3, %v20 +#CHECK: vsbcbi %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xbd] +#CHECK: vsbcbi %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xbd] +#CHECK: vsbcbi %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xbd] +#CHECK: vsbcbi %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xbd] +#CHECK: vsbcbi %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xbd] +#CHECK: vsbcbi %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xbd] +#CHECK: vsbcbi %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xbd] + + vsbcbi %v0, %v0, %v0, %v0, 0 + vsbcbi %v0, %v0, %v0, %v0, 15 + vsbcbi %v0, %v0, %v0, %v31, 0 + vsbcbi %v0, %v0, %v31, %v0, 0 + vsbcbi %v0, %v31, %v0, %v0, 0 + vsbcbi %v31, %v0, %v0, %v0, 0 + vsbcbi %v13, %v17, %v21, %v25, 11 + #CHECK: vsbcbiq %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x04,0x00,0x00,0xbd] #CHECK: vsbcbiq %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x04,0x00,0xf1,0xbd] #CHECK: vsbcbiq %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf4,0x00,0x02,0xbd] @@ -3906,6 +5295,22 @@ vsbcbiq %v31, %v0, %v0, %v0 vsbcbiq %v13, %v17, %v21, %v25 +#CHECK: vsbi %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xbf] +#CHECK: vsbi %v0, %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0xbf] +#CHECK: vsbi %v0, %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0xbf] +#CHECK: vsbi %v0, %v0, %v31, %v0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xbf] +#CHECK: vsbi %v0, %v31, %v0, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xbf] +#CHECK: vsbi %v31, %v0, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xbf] +#CHECK: vsbi %v13, %v17, %v21, %v25, 11 # encoding: [0xe7,0xd1,0x5b,0x00,0x97,0xbf] + + vsbi %v0, %v0, %v0, %v0, 0 + vsbi %v0, %v0, %v0, %v0, 15 + vsbi %v0, %v0, %v0, %v31, 0 + vsbi %v0, %v0, %v31, %v0, 0 + vsbi %v0, %v31, %v0, %v0, 0 + vsbi %v31, %v0, %v0, %v0, 0 + vsbi %v13, %v17, %v21, %v25, 11 + #CHECK: vsbiq %v0, %v0, %v0, %v0 # encoding: [0xe7,0x00,0x04,0x00,0x00,0xbf] #CHECK: vsbiq %v0, %v0, %v0, %v31 # encoding: [0xe7,0x00,0x04,0x00,0xf1,0xbf] #CHECK: vsbiq %v0, %v0, %v31, %v0 # encoding: [0xe7,0x00,0xf4,0x00,0x02,0xbf] @@ -3920,6 +5325,20 @@ vsbiq %v31, %v0, %v0, %v0 vsbiq %v13, %v17, %v21, %v25 +#CHECK: vscbi %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf5] +#CHECK: vscbi %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf5] +#CHECK: vscbi %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf5] +#CHECK: vscbi %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf5] +#CHECK: vscbi %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf5] +#CHECK: vscbi %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0xf5] + + vscbi %v0, %v0, %v0, 0 + vscbi %v0, %v0, %v0, 15 + vscbi %v0, %v0, %v31, 0 + vscbi %v0, %v31, %v0, 0 + vscbi %v31, %v0, %v0, 0 + vscbi %v18, %v3, %v20, 11 + #CHECK: vscbib %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf5] #CHECK: vscbib %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf5] #CHECK: vscbib %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf5] @@ -4038,6 +5457,22 @@ vsel %v31, %v0, %v0, %v0 vsel %v13, %v17, %v21, %v25 +#CHECK: vseg %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x5f] +#CHECK: vseg %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x5f] +#CHECK: vseg %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x5f] +#CHECK: vseg %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x5f] +#CHECK: vseg %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x5f] +#CHECK: vseg %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x5f] +#CHECK: vseg %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0x5f] + + vseg %v0, %v0, 0 + vseg %v0, %v0, 15 + vseg %v0, %v15, 0 + vseg %v0, %v31, 0 + vseg %v15, %v0, 0 + vseg %v31, %v0, 0 + vseg %v14, %v17, 11 + #CHECK: vsegb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x5f] #CHECK: vsegb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x5f] #CHECK: vsegb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x5f] @@ -4332,6 +5767,38 @@ vstm %v31, %v0, 0 vstm %v14, %v17, 1074(%r5) +#CHECK: vstrc %v0, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x8a] +#CHECK: vstrc %v0, %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0x8a] +#CHECK: vstrc %v0, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x8a] +#CHECK: vstrc %v0, %v0, %v0, %v0, 15, 0 # encoding: [0xe7,0x00,0x0f,0x00,0x00,0x8a] +#CHECK: vstrc %v0, %v0, %v0, %v0, 0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x8a] +#CHECK: vstrc %v0, %v0, %v0, %v15, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x8a] +#CHECK: vstrc %v0, %v0, %v0, %v31, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf1,0x8a] +#CHECK: vstrc %v0, %v0, %v15, %v0, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x8a] +#CHECK: vstrc %v0, %v0, %v31, %v0, 0, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x8a] +#CHECK: vstrc %v0, %v15, %v0, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x8a] +#CHECK: vstrc %v0, %v31, %v0, %v0, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x8a] +#CHECK: vstrc %v15, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x8a] +#CHECK: vstrc %v31, %v0, %v0, %v0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x8a] +#CHECK: vstrc %v18, %v3, %v20, %v5, 11, 4 # encoding: [0xe7,0x23,0x4b,0x40,0x5a,0x8a] +#CHECK: vstrc %v18, %v3, %v20, %v5, 0, 15 # encoding: [0xe7,0x23,0x40,0xf0,0x5a,0x8a] + + vstrc %v0, %v0, %v0, %v0, 0 + vstrc %v0, %v0, %v0, %v0, 15 + vstrc %v0, %v0, %v0, %v0, 0, 0 + vstrc %v0, %v0, %v0, %v0, 15, 0 + vstrc %v0, %v0, %v0, %v0, 0, 12 + vstrc %v0, %v0, %v0, %v15, 0 + vstrc %v0, %v0, %v0, %v31, 0 + vstrc %v0, %v0, %v15, %v0, 0 + vstrc %v0, %v0, %v31, %v0, 0 + vstrc %v0, %v15, %v0, %v0, 0 + vstrc %v0, %v31, %v0, %v0, 0 + vstrc %v15, %v0, %v0, %v0, 0 + vstrc %v31, %v0, %v0, %v0, 0 + vstrc %v18, %v3, %v20, %v5, 11, 4 + vstrc %v18, %v3, %v20, %v5, 0, 15 + #CHECK: vstrcb %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x8a] #CHECK: vstrcb %v0, %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x8a] #CHECK: vstrcb %v0, %v0, %v0, %v0, 12 # encoding: [0xe7,0x00,0x00,0xc0,0x00,0x8a] @@ -4440,6 +5907,34 @@ vstrczhs %v18, %v3, %v20, %v5, 8 vstrczhs %v18, %v3, %v20, %v5, 15 +#CHECK: vsum %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x64] +#CHECK: vsum %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x64] +#CHECK: vsum %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x64] +#CHECK: vsum %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x64] +#CHECK: vsum %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x64] +#CHECK: vsum %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x64] + + vsum %v0, %v0, %v0, 0 + vsum %v0, %v0, %v0, 15 + vsum %v0, %v0, %v31, 0 + vsum %v0, %v31, %v0, 0 + vsum %v31, %v0, %v0, 0 + vsum %v18, %v3, %v20, 11 + +#CHECK: vsumg %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x65] +#CHECK: vsumg %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x65] +#CHECK: vsumg %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x65] +#CHECK: vsumg %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x65] +#CHECK: vsumg %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x65] +#CHECK: vsumg %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x65] + + vsumg %v0, %v0, %v0, 0 + vsumg %v0, %v0, %v0, 15 + vsumg %v0, %v0, %v31, 0 + vsumg %v0, %v31, %v0, 0 + vsumg %v31, %v0, %v0, 0 + vsumg %v18, %v3, %v20, 11 + #CHECK: vsumgh %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x10,0x65] #CHECK: vsumgh %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x12,0x65] #CHECK: vsumgh %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x14,0x65] @@ -4464,6 +5959,20 @@ vsumgf %v31, %v0, %v0 vsumgf %v18, %v3, %v20 +#CHECK: vsumq %v0, %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x67] +#CHECK: vsumq %v0, %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0x67] +#CHECK: vsumq %v0, %v0, %v31, 0 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x67] +#CHECK: vsumq %v0, %v31, %v0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x67] +#CHECK: vsumq %v31, %v0, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x67] +#CHECK: vsumq %v18, %v3, %v20, 11 # encoding: [0xe7,0x23,0x40,0x00,0xba,0x67] + + vsumq %v0, %v0, %v0, 0 + vsumq %v0, %v0, %v0, 15 + vsumq %v0, %v0, %v31, 0 + vsumq %v0, %v31, %v0, 0 + vsumq %v31, %v0, %v0, 0 + vsumq %v18, %v3, %v20, 11 + #CHECK: vsumqf %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x20,0x67] #CHECK: vsumqf %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x22,0x67] #CHECK: vsumqf %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x24,0x67] @@ -4526,6 +6035,22 @@ vtm %v31, %v0 vtm %v14, %v17 +#CHECK: vuph %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd7] +#CHECK: vuph %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xd7] +#CHECK: vuph %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd7] +#CHECK: vuph %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd7] +#CHECK: vuph %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xd7] +#CHECK: vuph %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xd7] +#CHECK: vuph %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xd7] + + vuph %v0, %v0, 0 + vuph %v0, %v0, 15 + vuph %v0, %v15, 0 + vuph %v0, %v31, 0 + vuph %v15, %v0, 0 + vuph %v31, %v0, 0 + vuph %v14, %v17, 11 + #CHECK: vuphb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd7] #CHECK: vuphb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd7] #CHECK: vuphb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd7] @@ -4568,6 +6093,22 @@ vuphh %v31, %v0 vuphh %v14, %v17 +#CHECK: vuplh %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd5] +#CHECK: vuplh %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xd5] +#CHECK: vuplh %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd5] +#CHECK: vuplh %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd5] +#CHECK: vuplh %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xd5] +#CHECK: vuplh %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xd5] +#CHECK: vuplh %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xd5] + + vuplh %v0, %v0, 0 + vuplh %v0, %v0, 15 + vuplh %v0, %v15, 0 + vuplh %v0, %v31, 0 + vuplh %v15, %v0, 0 + vuplh %v31, %v0, 0 + vuplh %v14, %v17, 11 + #CHECK: vuplhb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd5] #CHECK: vuplhb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd5] #CHECK: vuplhb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd5] @@ -4610,6 +6151,22 @@ vuplhh %v31, %v0 vuplhh %v14, %v17 +#CHECK: vupl %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd6] +#CHECK: vupl %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xd6] +#CHECK: vupl %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd6] +#CHECK: vupl %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd6] +#CHECK: vupl %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xd6] +#CHECK: vupl %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xd6] +#CHECK: vupl %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xd6] + + vupl %v0, %v0, 0 + vupl %v0, %v0, 15 + vupl %v0, %v15, 0 + vupl %v0, %v31, 0 + vupl %v15, %v0, 0 + vupl %v31, %v0, 0 + vupl %v14, %v17, 11 + #CHECK: vuplb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd6] #CHECK: vuplb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd6] #CHECK: vuplb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd6] @@ -4652,6 +6209,22 @@ vuplhw %v31, %v0 vuplhw %v14, %v17 +#CHECK: vupll %v0, %v0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd4] +#CHECK: vupll %v0, %v0, 15 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xd4] +#CHECK: vupll %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd4] +#CHECK: vupll %v0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd4] +#CHECK: vupll %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xd4] +#CHECK: vupll %v31, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xd4] +#CHECK: vupll %v14, %v17, 11 # encoding: [0xe7,0xe1,0x00,0x00,0xb4,0xd4] + + vupll %v0, %v0, 0 + vupll %v0, %v0, 15 + vupll %v0, %v15, 0 + vupll %v0, %v31, 0 + vupll %v15, %v0, 0 + vupll %v31, %v0, 0 + vupll %v14, %v17, 11 + #CHECK: vupllb %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xd4] #CHECK: vupllb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xd4] #CHECK: vupllb %v0, %v31 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xd4] @@ -4802,6 +6375,26 @@ wfadb %v31, %v0, %v0 wfadb %v18, %v3, %v20 +#CHECK: wfc %f0, %f0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xcb] +#CHECK: wfc %f0, %f0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xcb] +#CHECK: wfc %f0, %f0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xcb] +#CHECK: wfc %f0, %f0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xcb] +#CHECK: wfc %f0, %f15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xcb] +#CHECK: wfc %f0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xcb] +#CHECK: wfc %f15, %f0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xcb] +#CHECK: wfc %v31, %f0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xcb] +#CHECK: wfc %f14, %v17, 11, 9 # encoding: [0xe7,0xe1,0x00,0x09,0xb4,0xcb] + + wfc %v0, %v0, 0, 0 + wfc %v0, %v0, 15, 0 + wfc %v0, %v0, 0, 15 + wfc %f0, %f0, 0, 0 + wfc %v0, %v15, 0, 0 + wfc %v0, %v31, 0, 0 + wfc %v15, %v0, 0, 0 + wfc %v31, %v0, 0, 0 + wfc %v14, %v17, 11, 9 + #CHECK: wfcdb %f0, %f0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xcb] #CHECK: wfcdb %f0, %f0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xcb] #CHECK: wfcdb %f0, %f15 # encoding: [0xe7,0x0f,0x00,0x00,0x30,0xcb] @@ -4817,7 +6410,7 @@ wfcdb %v15, %v0 wfcdb %v31, %v0 wfcdb %v14, %v17 - + #CHECK: wfcedb %f0, %f0, %f0 # encoding: [0xe7,0x00,0x00,0x08,0x30,0xe8] #CHECK: wfcedb %f0, %f0, %f0 # encoding: [0xe7,0x00,0x00,0x08,0x30,0xe8] #CHECK: wfcedb %f0, %f0, %v31 # encoding: [0xe7,0x00,0xf0,0x08,0x32,0xe8] @@ -4934,6 +6527,26 @@ wfidb %v31, %v0, 0, 0 wfidb %v14, %v17, 4, 10 +#CHECK: wfk %f0, %f0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xca] +#CHECK: wfk %f0, %f0, 15, 0 # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xca] +#CHECK: wfk %f0, %f0, 0, 15 # encoding: [0xe7,0x00,0x00,0x0f,0x00,0xca] +#CHECK: wfk %f0, %f0, 0, 0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xca] +#CHECK: wfk %f0, %f15, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0xca] +#CHECK: wfk %f0, %v31, 0, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xca] +#CHECK: wfk %f15, %f0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0xca] +#CHECK: wfk %v31, %f0, 0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xca] +#CHECK: wfk %f14, %v17, 11, 9 # encoding: [0xe7,0xe1,0x00,0x09,0xb4,0xca] + + wfk %v0, %v0, 0, 0 + wfk %v0, %v0, 15, 0 + wfk %v0, %v0, 0, 15 + wfk %f0, %f0, 0, 0 + wfk %v0, %v15, 0, 0 + wfk %v0, %v31, 0, 0 + wfk %v15, %v0, 0, 0 + wfk %v31, %v0, 0, 0 + wfk %v14, %v17, 11, 9 + #CHECK: wfkdb %f0, %f0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xca] #CHECK: wfkdb %f0, %f0 # encoding: [0xe7,0x00,0x00,0x00,0x30,0xca] #CHECK: wfkdb %f0, %f15 # encoding: [0xe7,0x0f,0x00,0x00,0x30,0xca] @@ -4950,6 +6563,24 @@ wfkdb %v31, %v0 wfkdb %v14, %v17 +#CHECK: wfpsodb %f0, %f0, 0 # encoding: [0xe7,0x00,0x00,0x08,0x30,0xcc] +#CHECK: wfpsodb %f0, %f0, 0 # encoding: [0xe7,0x00,0x00,0x08,0x30,0xcc] +#CHECK: wfpsodb %f0, %f0, 15 # encoding: [0xe7,0x00,0x00,0xf8,0x30,0xcc] +#CHECK: wfpsodb %f0, %f15, 0 # encoding: [0xe7,0x0f,0x00,0x08,0x30,0xcc] +#CHECK: wfpsodb %f0, %v31, 0 # encoding: [0xe7,0x0f,0x00,0x08,0x34,0xcc] +#CHECK: wfpsodb %f15, %f0, 0 # encoding: [0xe7,0xf0,0x00,0x08,0x30,0xcc] +#CHECK: wfpsodb %v31, %f0, 0 # encoding: [0xe7,0xf0,0x00,0x08,0x38,0xcc] +#CHECK: wfpsodb %f14, %v17, 7 # encoding: [0xe7,0xe1,0x00,0x78,0x34,0xcc] + + wfpsodb %v0, %v0, 0 + wfpsodb %f0, %f0, 0 + wfpsodb %v0, %v0, 15 + wfpsodb %v0, %v15, 0 + wfpsodb %v0, %v31, 0 + wfpsodb %v15, %v0, 0 + wfpsodb %v31, %v0, 0 + wfpsodb %v14, %v17, 7 + #CHECK: wflcdb %f0, %f0 # encoding: [0xe7,0x00,0x00,0x08,0x30,0xcc] #CHECK: wflcdb %f0, %f0 # encoding: [0xe7,0x00,0x00,0x08,0x30,0xcc] #CHECK: wflcdb %f0, %f15 # encoding: [0xe7,0x0f,0x00,0x08,0x30,0xcc] |
