diff options
5 files changed, 27 insertions, 28 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 4bcabaaffa5..471078e6179 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -5030,11 +5030,8 @@ buildPCRelGlobalAddress(SelectionDAG &DAG, const GlobalValue *GV, // of the s_add_u32 instruction, we end up with an offset that is 4 bytes too // small. This requires us to add 4 to the global variable offset in order to // compute the correct address. - unsigned LoFlags = GAFlags; - if (LoFlags == SIInstrInfo::MO_NONE) - LoFlags = SIInstrInfo::MO_REL32; SDValue PtrLo = - DAG.getTargetGlobalAddress(GV, DL, MVT::i32, Offset + 4, LoFlags); + DAG.getTargetGlobalAddress(GV, DL, MVT::i32, Offset + 4, GAFlags); SDValue PtrHi; if (GAFlags == SIInstrInfo::MO_NONE) { PtrHi = DAG.getTargetConstant(0, DL, MVT::i32); diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index 22a642616b4..bb4169788f4 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -514,7 +514,7 @@ bool isReadOnlySegment(const GlobalValue *GV) { } bool shouldEmitConstantsToTextSection(const Triple &TT) { - return TT.getOS() != Triple::AMDHSA; + return TT.getOS() == Triple::AMDPAL; } int getIntegerAttribute(const Function &F, StringRef Name, int Default) { diff --git a/llvm/test/CodeGen/AMDGPU/global-constant.ll b/llvm/test/CodeGen/AMDGPU/global-constant.ll index 3ebc8e1e7df..9c1560a01af 100644 --- a/llvm/test/CodeGen/AMDGPU/global-constant.ll +++ b/llvm/test/CodeGen/AMDGPU/global-constant.ll @@ -1,5 +1,7 @@ -; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOHSA %s -; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA %s +; RUN: llc -mtriple=amdgcn--amdpal -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=PAL %s +; RUN: llc -mtriple=amdgcn-- -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOPAL %s +; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOPAL %s +; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOPAL %s @private1 = private unnamed_addr addrspace(4) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0] @private2 = private unnamed_addr addrspace(4) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0] @@ -8,23 +10,23 @@ ; GCN-LABEL: {{^}}private_test: ; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}} -; Non-HSA OSes use fixup into .text section. -; NOHSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1 -; NOHSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], 0 +; PAL OSes use fixup into .text section. +; PAL: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1 +; PAL: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], 0 -; HSA OSes use relocations. -; HSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1@rel32@lo+4 -; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], private1@rel32@hi+4 +; Non-PAL OSes use relocations. +; NOPAL: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1@rel32@lo+4 +; NOPAL: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], private1@rel32@hi+4 ; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}} -; Non-HSA OSes use fixup into .text section. -; NOHSA: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2 -; NOHSA: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0 +; PAL OSes use fixup into .text section. +; PAL: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2 +; PAL: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0 -; HSA OSes use relocations. -; HSA: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2@rel32@lo+4 -; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], private2@rel32@hi+4 +; Non-PAL OSes use relocations. +; NOPAL: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2@rel32@lo+4 +; NOPAL: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], private2@rel32@hi+4 define amdgpu_kernel void @private_test(i32 %index, float addrspace(1)* %out) { %ptr = getelementptr [4 x float], [4 x float] addrspace(4) * @private1, i32 0, i32 %index @@ -36,10 +38,10 @@ define amdgpu_kernel void @private_test(i32 %index, float addrspace(1)* %out) { ret void } -; HSA-LABEL: {{^}}available_externally_test: -; HSA: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}} -; HSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], available_externally@gotpcrel32@lo+4 -; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], available_externally@gotpcrel32@hi+4 +; NOPAL-LABEL: {{^}}available_externally_test: +; NOPAL: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}} +; NOPAL: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], available_externally@gotpcrel32@lo+4 +; NOPAL: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], available_externally@gotpcrel32@hi+4 define amdgpu_kernel void @available_externally_test(i32 addrspace(1)* %out) { %ptr = getelementptr [256 x i32], [256 x i32] addrspace(4)* @available_externally, i32 0, i32 1 %val = load i32, i32 addrspace(4)* %ptr @@ -47,8 +49,8 @@ define amdgpu_kernel void @available_externally_test(i32 addrspace(1)* %out) { ret void } -; NOHSA: .text -; HSA: .section .rodata +; PAL: .text +; NOPAL: .section .rodata ; GCN: private1: ; GCN: private2: diff --git a/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll b/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll index 886144a4a1c..45c55761cf6 100644 --- a/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll +++ b/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll @@ -2,7 +2,7 @@ ; RUN: llc -march=amdgcn -mcpu=tonga -filetype=obj < %s | llvm-readobj -r --symbols | FileCheck %s -check-prefix=GCN ; RUN: llc -march=r600 -mcpu=cypress -filetype=obj < %s | llvm-readobj -r --symbols | FileCheck %s -check-prefix=EG -; GCN: R_AMDGPU_REL32_LO extern_const_addrspace +; GCN: R_AMDGPU_GOTPCREL32_LO extern_const_addrspace 0x0 ; EG: R_AMDGPU_ABS32 extern_const_addrspace ; CHECK-DAG: Name: extern_const_addrspace diff --git a/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll b/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll index 9383bfb2358..4813960b98a 100644 --- a/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll +++ b/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll @@ -4,13 +4,13 @@ ; CHECK: Relocations [ ; CHECK: Section (3) .rel.text { -; CHECK: 0x58 R_AMDGPU_ABS32 .text 0x0 +; CHECK: 0x58 R_AMDGPU_ABS32 arr 0x0 ; CHECK: } ; CHECK: ] ; CHECK: Symbol { ; CHECK: Name: arr (11) -; CHECK: Value: 0x70 +; CHECK: Value: 0x0 ; CHECK: Size: 16 ; CHECK: Binding: Local (0x0) ; CHECK: Type: Object (0x1) |
