diff options
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrFPU.td | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/double2int.ll | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrFPU.td b/llvm/lib/Target/Mips/MipsInstrFPU.td index 72ed3e6700f..b0f4853b55a 100644 --- a/llvm/lib/Target/Mips/MipsInstrFPU.td +++ b/llvm/lib/Target/Mips/MipsInstrFPU.td @@ -359,6 +359,7 @@ def : Pat<(f32 (sint_to_fp CPURegs:$src)), (CVTS_W32 (MTC1 CPURegs:$src))>; def : Pat<(f64 (sint_to_fp CPURegs:$src)), (CVTD_W32 (MTC1 CPURegs:$src))>; def : Pat<(i32 (fp_to_sint FGR32:$src)), (MFC1 (TRUNC_W_S32 FGR32:$src))>; +def : Pat<(i32 (fp_to_sint AFGR64:$src)), (MFC1 (TRUNC_W_D32 AFGR64:$src))>; def : Pat<(i32 (bitconvert FGR32:$src)), (MFC1 FGR32:$src)>; def : Pat<(f32 (bitconvert CPURegs:$src)), (MTC1 CPURegs:$src)>; diff --git a/llvm/test/CodeGen/Mips/double2int.ll b/llvm/test/CodeGen/Mips/double2int.ll new file mode 100644 index 00000000000..3d033e1d100 --- /dev/null +++ b/llvm/test/CodeGen/Mips/double2int.ll @@ -0,0 +1,8 @@ +; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s + +define i32 @f1(double %d) nounwind readnone { +entry: +; CHECK: trunc.w.d $f{{[0-9]+}}, $f12 + %conv = fptosi double %d to i32 + ret i32 %conv +} |
