diff options
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 3 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/SystemZ/insns.txt | 8 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/insn-bad.s | 8 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/insn-good.s | 8 |
4 files changed, 13 insertions, 14 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td index fb530cc5332..7300b90c208 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td +++ b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td @@ -1020,8 +1020,7 @@ multiclass CmpSwapRSPair<string mnemonic, bits<8> rsOpcode, bits<16> rsyOpcode, class RotateSelectRIEf<string mnemonic, bits<16> opcode, RegisterOperand cls1, RegisterOperand cls2> : InstRIEf<opcode, (outs cls1:$R1), - (ins cls1:$R1src, cls2:$R2, - uimm8zx6:$I3, uimm8zx6:$I4, uimm8zx6:$I5), + (ins cls1:$R1src, cls2:$R2, uimm8:$I3, uimm8:$I4, uimm8zx6:$I5), mnemonic#"\t$R1, $R2, $I3, $I4, $I5", []> { let Constraints = "$R1 = $R1src"; let DisableEncoding = "$R1src"; diff --git a/llvm/test/MC/Disassembler/SystemZ/insns.txt b/llvm/test/MC/Disassembler/SystemZ/insns.txt index 56236f7037f..664ae807c63 100644 --- a/llvm/test/MC/Disassembler/SystemZ/insns.txt +++ b/llvm/test/MC/Disassembler/SystemZ/insns.txt @@ -4642,11 +4642,11 @@ # CHECK: risbg %r0, %r0, 0, 0, 63 0xec 0x00 0x00 0x00 0x3f 0x55 -# CHECK: risbg %r0, %r0, 0, 63, 0 -0xec 0x00 0x00 0x3f 0x00 0x55 +# CHECK: risbg %r0, %r0, 0, 255, 0 +0xec 0x00 0x00 0xff 0x00 0x55 -# CHECK: risbg %r0, %r0, 63, 0, 0 -0xec 0x00 0x3f 0x00 0x00 0x55 +# CHECK: risbg %r0, %r0, 255, 0, 0 +0xec 0x00 0xff 0x00 0x00 0x55 # CHECK: risbg %r0, %r15, 0, 0, 0 0xec 0x0f 0x00 0x00 0x00 0x55 diff --git a/llvm/test/MC/SystemZ/insn-bad.s b/llvm/test/MC/SystemZ/insn-bad.s index 24c77477e45..ea9a7edc01d 100644 --- a/llvm/test/MC/SystemZ/insn-bad.s +++ b/llvm/test/MC/SystemZ/insn-bad.s @@ -2102,18 +2102,18 @@ #CHECK: error: invalid operand #CHECK: risbg %r0,%r0,0,-1,0 #CHECK: error: invalid operand -#CHECK: risbg %r0,%r0,0,64,0 +#CHECK: risbg %r0,%r0,0,256,0 #CHECK: error: invalid operand #CHECK: risbg %r0,%r0,-1,0,0 #CHECK: error: invalid operand -#CHECK: risbg %r0,%r0,64,0,0 +#CHECK: risbg %r0,%r0,256,0,0 risbg %r0,%r0,0,0,-1 risbg %r0,%r0,0,0,64 risbg %r0,%r0,0,-1,0 - risbg %r0,%r0,0,64,0 + risbg %r0,%r0,0,256,0 risbg %r0,%r0,-1,0,0 - risbg %r0,%r0,64,0,0 + risbg %r0,%r0,256,0,0 #CHECK: error: invalid operand #CHECK: rll %r0,%r0,-524289 diff --git a/llvm/test/MC/SystemZ/insn-good.s b/llvm/test/MC/SystemZ/insn-good.s index 2309dfb903e..3adfa981cb9 100644 --- a/llvm/test/MC/SystemZ/insn-good.s +++ b/llvm/test/MC/SystemZ/insn-good.s @@ -5835,16 +5835,16 @@ #CHECK: risbg %r0, %r0, 0, 0, 0 # encoding: [0xec,0x00,0x00,0x00,0x00,0x55] #CHECK: risbg %r0, %r0, 0, 0, 63 # encoding: [0xec,0x00,0x00,0x00,0x3f,0x55] -#CHECK: risbg %r0, %r0, 0, 63, 0 # encoding: [0xec,0x00,0x00,0x3f,0x00,0x55] -#CHECK: risbg %r0, %r0, 63, 0, 0 # encoding: [0xec,0x00,0x3f,0x00,0x00,0x55] +#CHECK: risbg %r0, %r0, 0, 255, 0 # encoding: [0xec,0x00,0x00,0xff,0x00,0x55] +#CHECK: risbg %r0, %r0, 255, 0, 0 # encoding: [0xec,0x00,0xff,0x00,0x00,0x55] #CHECK: risbg %r0, %r15, 0, 0, 0 # encoding: [0xec,0x0f,0x00,0x00,0x00,0x55] #CHECK: risbg %r15, %r0, 0, 0, 0 # encoding: [0xec,0xf0,0x00,0x00,0x00,0x55] #CHECK: risbg %r4, %r5, 6, 7, 8 # encoding: [0xec,0x45,0x06,0x07,0x08,0x55] risbg %r0,%r0,0,0,0 risbg %r0,%r0,0,0,63 - risbg %r0,%r0,0,63,0 - risbg %r0,%r0,63,0,0 + risbg %r0,%r0,0,255,0 + risbg %r0,%r0,255,0,0 risbg %r0,%r15,0,0,0 risbg %r15,%r0,0,0,0 risbg %r4,%r5,6,7,8 |
