diff options
6 files changed, 27 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp index 014db54ae4f..d3d43c16056 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -69,6 +69,7 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, } break; case Mips::fixup_MIPS_PC19_S2: + case Mips::fixup_MICROMIPS_PC19_S2: // Forcing a signed division because Value can be negative. Value = (int64_t)Value / 4; // We now check if Value can be encoded as a 19-bit signed immediate. @@ -322,6 +323,7 @@ getFixupKindInfo(MCFixupKind Kind) const { { "fixup_MICROMIPS_PC10_S1", 0, 10, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_PC16_S1", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_MICROMIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_CALL16", 0, 16, 0 }, { "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 }, { "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 }, @@ -389,6 +391,7 @@ getFixupKindInfo(MCFixupKind Kind) const { { "fixup_MICROMIPS_PC10_S1", 6, 10, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_PC16_S1",16, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_MICROMIPS_PC19_S2",13, 19, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_MICROMIPS_CALL16", 16, 16, 0 }, { "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 }, { "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 }, diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp index 6cc526fd1a1..7aee53162d8 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp @@ -91,6 +91,8 @@ unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx, return ELF::R_MICROMIPS_PC16_S1; case Mips::fixup_MICROMIPS_PC26_S1: return ELF::R_MICROMIPS_PC26_S1; + case Mips::fixup_MICROMIPS_PC19_S2: + return ELF::R_MICROMIPS_PC19_S2; case Mips::fixup_MIPS_PC19_S2: return ELF::R_MIPS_PC19_S2; case Mips::fixup_MIPS_PC18_S3: diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h index 7a09fe28117..c718df77547 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h @@ -173,6 +173,9 @@ namespace Mips { // resulting in - R_MICROMIPS_PC26_S1 fixup_MICROMIPS_PC26_S1, + // resulting in - R_MICROMIPS_PC19_S2 + fixup_MICROMIPS_PC19_S2, + // resulting in - R_MICROMIPS_CALL16 fixup_MICROMIPS_CALL16, diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp index b0a4157c30a..15738da378a 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp @@ -877,8 +877,9 @@ MipsMCCodeEmitter::getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo, "getSimm19Lsl2Encoding expects only expressions or an immediate"); const MCExpr *Expr = MO.getExpr(); - Fixups.push_back(MCFixup::create(0, Expr, - MCFixupKind(Mips::fixup_MIPS_PC19_S2))); + Mips::Fixups FixupKind = isMicroMips(STI) ? Mips::fixup_MICROMIPS_PC19_S2 + : Mips::fixup_MIPS_PC19_S2; + Fixups.push_back(MCFixup::create(0, Expr, MCFixupKind(FixupKind))); return 0; } diff --git a/llvm/test/MC/Mips/micromips32r6/relocations.s b/llvm/test/MC/Mips/micromips32r6/relocations.s index 14baa6b37b6..98123ef8f9e 100644 --- a/llvm/test/MC/Mips/micromips32r6/relocations.s +++ b/llvm/test/MC/Mips/micromips32r6/relocations.s @@ -11,6 +11,12 @@ # CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A] # CHECK-FIXUP: # fixup A - offset: 0, # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1 +# CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2 +# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2 #------------------------------------------------------------------------------ # Check that the appropriate relocations were created. #------------------------------------------------------------------------------ @@ -21,4 +27,5 @@ balc bar bc bar - + addiupc $2,bar + lwpc $2,bar diff --git a/llvm/test/MC/Mips/micromips64r6/relocations.s b/llvm/test/MC/Mips/micromips64r6/relocations.s index b9e72436cfa..0963e830d9b 100644 --- a/llvm/test/MC/Mips/micromips64r6/relocations.s +++ b/llvm/test/MC/Mips/micromips64r6/relocations.s @@ -11,6 +11,12 @@ # CHECK-FIXUP: bc bar # encoding: [0b100101AA,A,A,A] # CHECK-FIXUP: # fixup A - offset: 0, # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC26_S1 +# CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2 +# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A] +# CHECK-FIXUP: # fixup A - offset: 0, +# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2 #------------------------------------------------------------------------------ # Check that the appropriate relocations were created. #------------------------------------------------------------------------------ @@ -21,3 +27,5 @@ balc bar bc bar + addiupc $2,bar + lwpc $2,bar |
