diff options
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 13 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll | 10 |
2 files changed, 14 insertions, 9 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 8440c39c18d..89dab098710 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -2048,16 +2048,23 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N, return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT); } - if (ConstantSDNode *Val = dyn_cast<ConstantSDNode>(N->getOperand(0))) { + if (ConstantSDNode *CVal = dyn_cast<ConstantSDNode>(N->getOperand(0))) { if (Signed) { + // Avoid undefined left shift of a negative in the constant fold. + // TODO: I'm not sure what the behavior of the hardware is, this should + // probably follow that instead. + int32_t Val = CVal->getSExtValue(); + if (Val < 0) + return SDValue(); + return constantFoldBFE<int32_t>(DAG, - Val->getSExtValue(), + Val, OffsetVal, WidthVal); } return constantFoldBFE<uint32_t>(DAG, - Val->getZExtValue(), + CVal->getZExtValue(), OffsetVal, WidthVal); } diff --git a/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll b/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll index b23995d0473..16a140cefa3 100644 --- a/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll +++ b/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll @@ -1,9 +1,6 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s ; RUN: llc -march=r600 -mcpu=redwood -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s -; http://llvm.org/bugs/show_bug.cgi?id=20982 -; REQUIRES: not_ubsan - declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone ; FUNC-LABEL: @bfe_i32_arg_arg_arg @@ -373,12 +370,13 @@ define void @bfe_i32_constant_fold_test_15(i32 addrspace(1)* %out) nounwind { ret void } +; FIXME: This should fold to something ; FUNC-LABEL: @bfe_i32_constant_fold_test_16 -; SI-NOT: BFE -; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], -1 +; SI: S_BFE_I32 [[SREG:s[0-9]+]], -1, 0x70001 +; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], [[SREG]] ; SI: BUFFER_STORE_DWORD [[VREG]], ; SI: S_ENDPGM -; EG-NOT: BFE + define void @bfe_i32_constant_fold_test_16(i32 addrspace(1)* %out) nounwind { %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 4294967295, i32 1, i32 7) nounwind readnone store i32 %bfe_i32, i32 addrspace(1)* %out, align 4 |
