diff options
| -rw-r--r-- | llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn | 10 | ||||
| -rw-r--r-- | llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn | 1 |
2 files changed, 11 insertions, 0 deletions
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn index b05e0891d12..0c27c11e2e0 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn @@ -30,6 +30,15 @@ tablegen("AArch64GenGlobalISel") { td_file = "AArch64.td" } +tablegen("AArch64GenGICombiner") { + visibility = [ ":LLVMAArch64CodeGen" ] + args = [ + "-gen-global-isel-combiner", + "-combiners=AArch64PreLegalizerCombinerHelper", + ] + td_file = "AArch64.td" +} + tablegen("AArch64GenMCPseudoLowering") { visibility = [ ":LLVMAArch64CodeGen" ] args = [ "-gen-pseudo-lowering" ] @@ -48,6 +57,7 @@ static_library("LLVMAArch64CodeGen") { ":AArch64GenCallingConv", ":AArch64GenDAGISel", ":AArch64GenFastISel", + ":AArch64GenGICombiner", ":AArch64GenGlobalISel", ":AArch64GenMCPseudoLowering", ":AArch64GenRegisterBank", diff --git a/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn b/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn index 01219543d2d..9f5043faeed 100644 --- a/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn @@ -30,6 +30,7 @@ executable("llvm-tblgen") { "ExegesisEmitter.cpp", "FastISelEmitter.cpp", "FixedLenDecoderEmitter.cpp", + "GICombinerEmitter.cpp", "GlobalISelEmitter.cpp", "InfoByHwMode.cpp", "InstrDocsEmitter.cpp", |
