diff options
73 files changed, 235 insertions, 238 deletions
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp index c99ce7752b3..2de36f8561c 100644 --- a/llvm/lib/MC/MCAsmStreamer.cpp +++ b/llvm/lib/MC/MCAsmStreamer.cpp @@ -807,7 +807,7 @@ void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value, default: llvm_unreachable("Invalid size for machine code value!"); case 1: - OS << "\t.align\t"; + OS << "\t.p2align\t"; break; case 2: OS << ".p2alignw "; @@ -819,10 +819,7 @@ void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value, llvm_unreachable("Unsupported alignment size!"); } - if (MAI->getAlignmentIsInBytes()) - OS << ByteAlignment; - else - OS << Log2_32(ByteAlignment); + OS << Log2_32(ByteAlignment); if (Value || MaxBytesToEmit) { OS << ", 0x"; diff --git a/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll b/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll index 4ab2bee0ed1..2eedde55764 100644 --- a/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll +++ b/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll @@ -4,7 +4,7 @@ ; getting both the endianness wrong and the element indexing wrong. define <8 x i16> @foo(<8 x i16> %a) nounwind readnone { ; CHECK: .section __TEXT,__literal16,16byte_literals -; CHECK: .align 4 +; CHECK: .p2align 4 ; CHECK:lCPI0_0: ; CHECK: .byte 0 ; 0x0 ; CHECK: .byte 1 ; 0x1 @@ -24,7 +24,7 @@ define <8 x i16> @foo(<8 x i16> %a) nounwind readnone { ; CHECK: .byte 9 ; 0x9 ; CHECK: .section __TEXT,__text,regular,pure_instructions ; CHECK: .globl _foo -; CHECK: .align 2 +; CHECK: .p2align 2 ; CHECK:_foo: ; @foo ; CHECK: adrp [[BASE:x[0-9]+]], lCPI0_0@PAGE ; CHECK: ldr q[[REG:[0-9]+]], {{\[}}[[BASE]], lCPI0_0@PAGEOFF] diff --git a/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll b/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll index c95eca062ff..bb9ad46ba63 100644 --- a/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll +++ b/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll @@ -40,7 +40,7 @@ define i32 @test_emulated_init() { ; EMU-NOT: __emutls_v.general_dynamic_var: -; EMU: .align 3 +; EMU: .p2align 3 ; EMU-LABEL: __emutls_v.emulated_init_var: ; EMU-NEXT: .xword 4 ; EMU-NEXT: .xword 8 diff --git a/llvm/test/CodeGen/AArch64/emutls.ll b/llvm/test/CodeGen/AArch64/emutls.ll index f2a92556068..b2eb913a93e 100644 --- a/llvm/test/CodeGen/AArch64/emutls.ll +++ b/llvm/test/CodeGen/AArch64/emutls.ll @@ -189,7 +189,7 @@ entry: ; ARM64: .section .data.__emutls_v._ZN1AIiE1xE,{{.*}},__emutls_v._ZN1AIiE1xE,comdat ; ARM64: .weak __emutls_v._ZN1AIiE1xE -; ARM64: .align 3 +; ARM64: .p2align 3 ; ARM64-LABEL: __emutls_v._ZN1AIiE1xE: ; ARM64-NEXT: .xword 4 ; ARM64-NEXT: .xword 4 @@ -198,7 +198,7 @@ entry: ; ARM64: .section .data.__emutls_v._ZN1AIfE1xE,{{.*}},__emutls_v._ZN1AIfE1xE,comdat ; ARM64: .weak __emutls_v._ZN1AIfE1xE -; ARM64: .align 3 +; ARM64: .p2align 3 ; ARM64-LABEL: __emutls_v._ZN1AIfE1xE: ; ARM64-NEXT: .xword 4 ; ARM64-NEXT: .xword 4 @@ -207,7 +207,7 @@ entry: ; ARM64: .section .rodata.__emutls_t._ZN1AIfE1xE,{{.*}},__emutls_t._ZN1AIfE1xE,comdat ; ARM64: .weak __emutls_t._ZN1AIfE1xE -; ARM64: .align 2 +; ARM64: .p2align 2 ; ARM64-LABEL: __emutls_t._ZN1AIfE1xE: ; ARM64-NEXT: .word 0 ; ARM64-NEXT: .size diff --git a/llvm/test/CodeGen/AArch64/emutls_generic.ll b/llvm/test/CodeGen/AArch64/emutls_generic.ll index 33df6cc79c0..03473cf80ee 100644 --- a/llvm/test/CodeGen/AArch64/emutls_generic.ll +++ b/llvm/test/CodeGen/AArch64/emutls_generic.ll @@ -39,7 +39,7 @@ entry: ; ARM_64-NOT: __emutls_v.external_x: ; ARM_64: .data{{$}} ; ARM_64: .globl __emutls_v.external_y -; ARM_64: .align 3 +; ARM_64: .p2align 3 ; ARM_64-LABEL: __emutls_v.external_y: ; ARM_64-NEXT: .xword 1 ; ARM_64-NEXT: .xword 2 @@ -51,7 +51,7 @@ entry: ; ARM_64-NEXT: .byte 7 ; ARM_64: .data{{$}} ; ARM_64-NOT: .globl __emutls_v -; ARM_64: .align 3 +; ARM_64: .p2align 3 ; ARM_64-LABEL: __emutls_v.internal_y: ; ARM_64-NEXT: .xword 8 ; ARM_64-NEXT: .xword 16 diff --git a/llvm/test/CodeGen/AArch64/global-merge-3.ll b/llvm/test/CodeGen/AArch64/global-merge-3.ll index 6895380ca63..481be4017b0 100644 --- a/llvm/test/CodeGen/AArch64/global-merge-3.ll +++ b/llvm/test/CodeGen/AArch64/global-merge-3.ll @@ -21,7 +21,7 @@ define void @f1(i32 %a1, i32 %a2, i32 %a3) { } ;CHECK: .type .L_MergedGlobals,@object // @_MergedGlobals -;CHECK: .align 4 +;CHECK: .p2align 4 ;CHECK: .L_MergedGlobals: ;CHECK: .size .L_MergedGlobals, 4004 @@ -29,7 +29,7 @@ define void @f1(i32 %a1, i32 %a2, i32 %a3) { ;CHECK: .local .L_MergedGlobals.1 ;CHECK: .comm .L_MergedGlobals.1,4000,16 -;CHECK-APPLE-IOS: .align 4 +;CHECK-APPLE-IOS: .p2align 4 ;CHECK-APPLE-IOS: l__MergedGlobals: ;CHECK-APPLE-IOS: .long 1 ;CHECK-APPLE-IOS: .space 4000 diff --git a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll index 6b37aac16f9..224a9c41852 100644 --- a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll +++ b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll @@ -37,7 +37,7 @@ define i64 @stackmap_liveness(i1 %c) { ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 8 ; Align -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 %1 = select i1 %c, i64 1, i64 2 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, i8* null, i32 0) ret i64 %1 diff --git a/llvm/test/CodeGen/AMDGPU/elf.ll b/llvm/test/CodeGen/AMDGPU/elf.ll index 90af6782c4b..c523ff17e20 100644 --- a/llvm/test/CodeGen/AMDGPU/elf.ll +++ b/llvm/test/CodeGen/AMDGPU/elf.ll @@ -22,7 +22,7 @@ ; CONFIG-NEXT: .long 45096 ; TYPICAL-NEXT: .long 0 ; TONGA-NEXT: .long 576 -; CONFIG: .align 256 +; CONFIG: .p2align 8 ; CONFIG: test: define void @test(i32 %p) #0 { %i = add i32 %p, 2 diff --git a/llvm/test/CodeGen/ARM/Windows/long-calls.ll b/llvm/test/CodeGen/ARM/Windows/long-calls.ll index 4e5bdce146f..a878fad91e1 100644 --- a/llvm/test/CodeGen/ARM/Windows/long-calls.ll +++ b/llvm/test/CodeGen/ARM/Windows/long-calls.ll @@ -12,7 +12,7 @@ entry: ; CHECK-LABEL: caller ; CHECK: ldr [[REG:r[0-9]+]], [[CPI:LCPI[_0-9]+]] ; CHECK: bx [[REG]] -; CHECK: .align 2 +; CHECK: .p2align 2 ; CHECK: [[CPI]]: ; CHECK: .long callee diff --git a/llvm/test/CodeGen/ARM/align.ll b/llvm/test/CodeGen/ARM/align.ll index 9589e72df2f..74525909148 100644 --- a/llvm/test/CodeGen/ARM/align.ll +++ b/llvm/test/CodeGen/ARM/align.ll @@ -8,33 +8,33 @@ ; no alignment @c = global i16 2 -;ELF: .align 1 +;ELF: .p2align 1 ;ELF: c: -;DARWIN: .align 1 +;DARWIN: .p2align 1 ;DARWIN: _c: @d = global i32 3 -;ELF: .align 2 +;ELF: .p2align 2 ;ELF: d: -;DARWIN: .align 2 +;DARWIN: .p2align 2 ;DARWIN: _d: @e = global i64 4 -;ELF: .align 3 +;ELF: .p2align 3 ;ELF: e -;DARWIN: .align 3 +;DARWIN: .p2align 3 ;DARWIN: _e: @f = global float 5.0 -;ELF: .align 2 +;ELF: .p2align 2 ;ELF: f: -;DARWIN: .align 2 +;DARWIN: .p2align 2 ;DARWIN: _f: @g = global double 6.0 -;ELF: .align 3 +;ELF: .p2align 3 ;ELF: g: -;DARWIN: .align 3 +;DARWIN: .p2align 3 ;DARWIN: _g: @bar = common global [75 x i8] zeroinitializer, align 128 diff --git a/llvm/test/CodeGen/ARM/byval_load_align.ll b/llvm/test/CodeGen/ARM/byval_load_align.ll index 2c0910c71d2..d00d926c7a0 100644 --- a/llvm/test/CodeGen/ARM/byval_load_align.ll +++ b/llvm/test/CodeGen/ARM/byval_load_align.ll @@ -7,7 +7,7 @@ ; CHECK: ldr r2, [r[[REG]], #4] ; CHECK: ldr r3, [r[[REG]], #8] ; CHECK-NOT: ldm -; CHECK: .align 1 @ @sID +; CHECK: .p2align 1 @ @sID %struct.ModuleID = type { [32 x i8], [32 x i8], i16 } diff --git a/llvm/test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll b/llvm/test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll index 3d380bf8f22..517d5597bb2 100644 --- a/llvm/test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll +++ b/llvm/test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll @@ -42,7 +42,7 @@ try.cont: } ; CHECK: .globl test1 -; CHECK: .align 2 +; CHECK: .p2align 2 ; CHECK: .type test1,%function ; CHECK-LABEL: test1: ; CHECK: .fnstart @@ -51,7 +51,7 @@ try.cont: ; CHECK: .personality __gxx_personality_v0 ; CHECK: .handlerdata -; CHECK: .align 2 +; CHECK: .p2align 2 ; CHECK-LABEL: GCC_except_table0: ; CHECK-LABEL: .Lexception0: ; CHECK: .byte 255 @ @LPStart Encoding = omit diff --git a/llvm/test/CodeGen/ARM/ehabi-handlerdata.ll b/llvm/test/CodeGen/ARM/ehabi-handlerdata.ll index c53b36ffe18..ecb23c3424e 100644 --- a/llvm/test/CodeGen/ARM/ehabi-handlerdata.ll +++ b/llvm/test/CodeGen/ARM/ehabi-handlerdata.ll @@ -40,13 +40,13 @@ try.cont: } ; CHECK: .globl test1 -; CHECK: .align 2 +; CHECK: .p2align 2 ; CHECK: .type test1,%function ; CHECK-LABEL: test1: ; CHECK: .fnstart ; CHECK: .personality __gxx_personality_v0 ; CHECK: .handlerdata -; CHECK: .align 2 +; CHECK: .p2align 2 ; CHECK-LABEL: GCC_except_table0: ; CHECK-LABEL: .Lexception0: ; CHECK: .byte 255 @ @LPStart Encoding = omit diff --git a/llvm/test/CodeGen/ARM/emutls_generic.ll b/llvm/test/CodeGen/ARM/emutls_generic.ll index 872dd83f299..f5633dc23bc 100644 --- a/llvm/test/CodeGen/ARM/emutls_generic.ll +++ b/llvm/test/CodeGen/ARM/emutls_generic.ll @@ -41,7 +41,7 @@ entry: ; ARM_32-NOT: __emutls_v.external_x: ; ARM_32: .data{{$}} ; ARM_32: .globl __emutls_v.external_y -; ARM_32: .align 2 +; ARM_32: .p2align 2 ; ARM_32-LABEL: __emutls_v.external_y: ; ARM_32-NEXT: .long 1 ; ARM_32-NEXT: .long 2 @@ -52,7 +52,7 @@ entry: ; ARM_32-NEXT: .byte 7 ; ARM_32: .data{{$}} ; ARM_32-NOT: .globl -; ARM_32: .align 2 +; ARM_32: .p2align 2 ; ARM_32-LABEL: __emutls_v.internal_y: ; ARM_32-NEXT: .long 8 ; ARM_32-NEXT: .long 16 diff --git a/llvm/test/CodeGen/ARM/globals.ll b/llvm/test/CodeGen/ARM/globals.ll index e6aa2db744d..399d5208ae2 100644 --- a/llvm/test/CodeGen/ARM/globals.ll +++ b/llvm/test/CodeGen/ARM/globals.ll @@ -15,7 +15,7 @@ define i32 @test1() { ; DarwinStatic: ldr r0, [r0] ; DarwinStatic: bx lr -; DarwinStatic: .align 2 +; DarwinStatic: .p2align 2 ; DarwinStatic: LCPI0_0: ; DarwinStatic: .long {{_G$}} @@ -26,12 +26,12 @@ define i32 @test1() { ; DarwinDynamic: ldr r0, [r0] ; DarwinDynamic: bx lr -; DarwinDynamic: .align 2 +; DarwinDynamic: .p2align 2 ; DarwinDynamic: LCPI0_0: ; DarwinDynamic: .long L_G$non_lazy_ptr ; DarwinDynamic: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers -; DarwinDynamic: .align 2 +; DarwinDynamic: .p2align 2 ; DarwinDynamic: L_G$non_lazy_ptr: ; DarwinDynamic: .indirect_symbol _G ; DarwinDynamic: .long 0 @@ -46,12 +46,12 @@ define i32 @test1() { ; DarwinPIC-NOT: ldr ; DarwinPIC: bx lr -; DarwinPIC: .align 2 +; DarwinPIC: .p2align 2 ; DarwinPIC: LCPI0_0: ; DarwinPIC: .long L_G$non_lazy_ptr-(LPC0_0+8) ; DarwinPIC: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers -; DarwinPIC: .align 2 +; DarwinPIC: .p2align 2 ; DarwinPIC: L_G$non_lazy_ptr: ; DarwinPIC: .indirect_symbol _G ; DarwinPIC: .long 0 @@ -66,7 +66,7 @@ define i32 @test1() { ; LinuxPIC: ldr r0, [r0] ; LinuxPIC: bx lr -; LinuxPIC: .align 2 +; LinuxPIC: .p2align 2 ; LinuxPIC: .LCPI0_0: ; LinuxPIC: .Ltmp0: ; LinuxPIC: .long G(GOT_PREL)-((.LPC0_0+8)-.Ltmp0) diff --git a/llvm/test/CodeGen/ARM/memfunc.ll b/llvm/test/CodeGen/ARM/memfunc.ll index 46fef7629cc..352345645e9 100644 --- a/llvm/test/CodeGen/ARM/memfunc.ll +++ b/llvm/test/CodeGen/ARM/memfunc.ll @@ -398,22 +398,22 @@ entry: } ; CHECK: {{\.data|\.section.+data}} -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: arr1: -; CHECK-IOS: .align 3 -; CHECK-DARWIN: .align 2 -; CHECK-EABI-NOT: .align -; CHECK-GNUEABI-NOT: .align +; CHECK-IOS: .p2align 3 +; CHECK-DARWIN: .p2align 2 +; CHECK-EABI-NOT: .p2align +; CHECK-GNUEABI-NOT: .p2align ; CHECK: arr2: ; CHECK: {{\.section.+foo,bar}} -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: arr3: -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: arr4: ; CHECK: {{\.data|\.section.+data}} -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: arr5: -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: arr6: ; CHECK-NOT: arr7: diff --git a/llvm/test/CodeGen/ARM/preferred-align.ll b/llvm/test/CodeGen/ARM/preferred-align.ll index 8cd4ef61546..a9a17229e06 100644 --- a/llvm/test/CodeGen/ARM/preferred-align.ll +++ b/llvm/test/CodeGen/ARM/preferred-align.ll @@ -3,19 +3,19 @@ @var_agg = global {i8, i8} zeroinitializer ; CHECK: .globl var_agg -; CHECK-NEXT: .align 2 +; CHECK-NEXT: .p2align 2 @var1 = global i1 zeroinitializer ; CHECK: .globl var1 -; CHECK-NOT: .align +; CHECK-NOT: .p2align @var8 = global i8 zeroinitializer ; CHECK: .globl var8 -; CHECK-NOT: .align +; CHECK-NOT: .p2align @var16 = global i16 zeroinitializer ; CHECK: .globl var16 -; CHECK-NEXT: .align 1
\ No newline at end of file +; CHECK-NEXT: .p2align 1
\ No newline at end of file diff --git a/llvm/test/CodeGen/ARM/thumb-alignment.ll b/llvm/test/CodeGen/ARM/thumb-alignment.ll index b9ddfbb714d..8e894d28b6c 100644 --- a/llvm/test/CodeGen/ARM/thumb-alignment.ll +++ b/llvm/test/CodeGen/ARM/thumb-alignment.ll @@ -3,13 +3,13 @@ @x = external global i32 ; CHECK: .globl foo -; CHECK-NEXT: .align 2 +; CHECK-NEXT: .p2align 2 define i32* @foo() { ret i32* @x } ; CHECK: .globl bar -; CHECK-NEXT: .align 1 +; CHECK-NEXT: .p2align 1 define i32* @bar() { ret i32* zeroinitializer } @@ -22,7 +22,7 @@ define i32* @bar() { ; Create a Thumb-2 jump table, which should force alignment to 4 bytes. ; CHECK: .globl baz -; CHECK-NEXT: .align 2 +; CHECK-NEXT: .p2align 2 ; CHECK: tbb define i32 @baz() { %1 = load i32, i32* @c, align 4 diff --git a/llvm/test/CodeGen/ARM/tls-models.ll b/llvm/test/CodeGen/ARM/tls-models.ll index f3c58f74ebf..d8c74d213b1 100644 --- a/llvm/test/CodeGen/ARM/tls-models.ll +++ b/llvm/test/CodeGen/ARM/tls-models.ll @@ -130,7 +130,7 @@ entry: ; EMU-NOT: __emutls_t.external_gd ; EMU-NOT: __emutls_v.external_gd -; EMU: .align 2 +; EMU: .p2align 2 ; EMU-LABEL: __emutls_v.internal_gd: ; EMU-NEXT: .long 4 ; EMU-NEXT: .long 4 @@ -144,7 +144,7 @@ entry: ; EMU-NOT: __emutls_t.external_gd ; EMU-NOT: __emutls_v.external_gd -; EMU: .align 2 +; EMU: .p2align 2 ; EMU-LABEL: __emutls_v.internal_le: ; EMU-NEXT: .long 4 ; EMU-NEXT: .long 4 diff --git a/llvm/test/CodeGen/ARM/tls3.ll b/llvm/test/CodeGen/ARM/tls3.ll index 94cadeedd93..ca3cde264da 100644 --- a/llvm/test/CodeGen/ARM/tls3.ll +++ b/llvm/test/CodeGen/ARM/tls3.ll @@ -23,7 +23,7 @@ entry: ; CHECK-NOT: __emutls_t.teste -; EMU: .align 2 +; EMU: .p2align 2 ; EMU-LABEL: __emutls_v.teste: ; EMU-NEXT: .long 8 ; EMU-NEXT: .long 4 diff --git a/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll b/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll index fd0254e9f5e..7d66d1a1a20 100644 --- a/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll +++ b/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll @@ -55,19 +55,19 @@ bb5: ; preds = %entry ret i32 1 } -; STATIC-O32: .align 2 +; STATIC-O32: .p2align 2 ; STATIC-O32: $JTI0_0: ; STATIC-O32: .4byte ; STATIC-O32: .4byte ; STATIC-O32: .4byte ; STATIC-O32: .4byte -; PIC-O32: .align 2 +; PIC-O32: .p2align 2 ; PIC-O32: $JTI0_0: ; PIC-O32: .gpword ; PIC-O32: .gpword ; PIC-O32: .gpword ; PIC-O32: .gpword -; N64: .align 3 +; N64: .p2align 3 ; N64: $JTI0_0: ; N64: .gpdword ; N64: .gpdword diff --git a/llvm/test/CodeGen/Mips/cconv/memory-layout.ll b/llvm/test/CodeGen/Mips/cconv/memory-layout.ll index 33a68da157f..25aba97e3ab 100644 --- a/llvm/test/CodeGen/Mips/cconv/memory-layout.ll +++ b/llvm/test/CodeGen/Mips/cconv/memory-layout.ll @@ -27,39 +27,39 @@ @double = global double 1.0, align 1 @pointer = global i8* @byte -; ALL-NOT: .align +; ALL-NOT: .p2align ; ALL-LABEL: byte: ; ALL: .byte 1 ; ALL: .size byte, 1 -; ALL: .align 1 +; ALL: .p2align 1 ; ALL-LABEL: halfword: ; ALL: .2byte 258 ; ALL: .size halfword, 2 -; ALL: .align 2 +; ALL: .p2align 2 ; ALL-LABEL: word: ; ALL: .4byte 16909060 ; ALL: .size word, 4 -; ALL: .align 2 +; ALL: .p2align 2 ; ALL-LABEL: float: ; ALL: .4byte 1065353216 ; ALL: .size float, 4 -; ALL: .align 3 +; ALL: .p2align 3 ; ALL-LABEL: dword: ; ALL: .8byte 283686952306183 ; ALL: .size dword, 8 -; ALL: .align 3 +; ALL: .p2align 3 ; ALL-LABEL: double: ; ALL: .8byte 4607182418800017408 ; ALL: .size double, 8 -; O32: .align 2 -; N32: .align 2 -; N64: .align 3 +; O32: .p2align 2 +; N32: .p2align 2 +; N64: .p2align 3 ; ALL-LABEL: pointer: ; O32: .4byte byte ; O32: .size pointer, 4 @@ -76,44 +76,44 @@ @double_array = global [2 x double] [double 1.0, double 2.0], align 1 @pointer_array = global [2 x i8*] [i8* @byte, i8* @byte] -; ALL-NOT: .align +; ALL-NOT: .p2align ; ALL-LABEL: byte_array: ; ALL: .ascii "\001\002" ; ALL: .size byte_array, 2 -; ALL: .align 1 +; ALL: .p2align 1 ; ALL-LABEL: halfword_array: ; ALL: .2byte 1 ; ALL: .2byte 2 ; ALL: .size halfword_array, 4 -; ALL: .align 2 +; ALL: .p2align 2 ; ALL-LABEL: word_array: ; ALL: .4byte 1 ; ALL: .4byte 2 ; ALL: .size word_array, 8 -; ALL: .align 2 +; ALL: .p2align 2 ; ALL-LABEL: float_array: ; ALL: .4byte 1065353216 ; ALL: .4byte 1073741824 ; ALL: .size float_array, 8 -; ALL: .align 3 +; ALL: .p2align 3 ; ALL-LABEL: dword_array: ; ALL: .8byte 1 ; ALL: .8byte 2 ; ALL: .size dword_array, 16 -; ALL: .align 3 +; ALL: .p2align 3 ; ALL-LABEL: double_array: ; ALL: .8byte 4607182418800017408 ; ALL: .8byte 4611686018427387904 ; ALL: .size double_array, 16 -; O32: .align 2 -; N32: .align 2 -; N64: .align 3 +; O32: .p2align 2 +; N32: .p2align 2 +; N64: .p2align 3 ; ALL-LABEL: pointer_array: ; O32: .4byte byte ; O32: .4byte byte @@ -128,7 +128,7 @@ %mixed = type { i8, double, i16 } @mixed = global %mixed { i8 1, double 1.0, i16 515 }, align 1 -; ALL: .align 3 +; ALL: .p2align 3 ; ALL-LABEL: mixed: ; ALL: .byte 1 ; ALL: .space 7 diff --git a/llvm/test/CodeGen/Mips/const4a.ll b/llvm/test/CodeGen/Mips/const4a.ll index d1182d7fc6e..df4a1d9ff9a 100644 --- a/llvm/test/CodeGen/Mips/const4a.ll +++ b/llvm/test/CodeGen/Mips/const4a.ll @@ -21,7 +21,7 @@ entry: ; no-load-relax: beqz ${{[0-9]+}}, $BB0_3 ; no-load-relax: lw ${{[0-9]+}}, %call16(foo)(${{[0-9]+}}) ; no-load-relax: b $BB0_4 -; no-load-relax: .align 2 +; no-load-relax: .p2align 2 ; no-load-relax: $CPI0_1: ; no-load-relax: .4byte 3735943886 ; no-load-relax: $BB0_3: diff --git a/llvm/test/CodeGen/Mips/const6.ll b/llvm/test/CodeGen/Mips/const6.ll index c576f573a43..9085e38b3f6 100644 --- a/llvm/test/CodeGen/Mips/const6.ll +++ b/llvm/test/CodeGen/Mips/const6.ll @@ -18,7 +18,7 @@ entry: store i32 -559023410, i32* @i, align 4 ; load-relax: lw ${{[0-9]+}}, $CPI0_0 ; load-relax: jrc $ra -; load-relax: .align 2 +; load-relax: .p2align 2 ; load-relax: $CPI0_0: ; load-relax: .4byte 3735943886 ; load-relax: .end t @@ -26,7 +26,7 @@ entry: ; no-load-relax: lw ${{[0-9]+}}, $CPI0_1 # 16 bit inst ; no-load-relax: jalrc ${{[0-9]+}} ; no-load-relax: b $BB0_2 -; no-load-relax: .align 2 +; no-load-relax: .p2align 2 ; no-load-relax: $CPI0_1: ; no-load-relax: .4byte 3735943886 ; no-load-relax: $BB0_2: diff --git a/llvm/test/CodeGen/Mips/const6a.ll b/llvm/test/CodeGen/Mips/const6a.ll index 653cdeb920f..80eedb4c897 100644 --- a/llvm/test/CodeGen/Mips/const6a.ll +++ b/llvm/test/CodeGen/Mips/const6a.ll @@ -15,7 +15,7 @@ entry: ; load-relax-NOT: lw ${{[0-9]+}}, $CPI0_0 # 16 bit inst ; load-relax1: lw ${{[0-9]+}}, $CPI0_0 ; load-relax: jrc $ra -; load-relax: .align 2 +; load-relax: .p2align 2 ; load-relax: $CPI0_0: ; load-relax: .4byte 3735943886 ; load-relax: .end t diff --git a/llvm/test/CodeGen/Mips/ehframe-indirect.ll b/llvm/test/CodeGen/Mips/ehframe-indirect.ll index a51cfb7e0fc..a905708f8ea 100644 --- a/llvm/test/CodeGen/Mips/ehframe-indirect.ll +++ b/llvm/test/CodeGen/Mips/ehframe-indirect.ll @@ -42,9 +42,9 @@ declare void @foo() ; ALL: .hidden DW.ref.__gxx_personality_v0 ; ALL: .weak DW.ref.__gxx_personality_v0 ; ALL: .section .data.DW.ref.__gxx_personality_v0,"aGw",@progbits,DW.ref.__gxx_personality_v0,comdat -; O32: .align 2 -; N32: .align 2 -; N64: .align 3 +; O32: .p2align 2 +; N32: .p2align 2 +; N64: .p2align 3 ; ALL: .type DW.ref.__gxx_personality_v0,@object ; O32: .size DW.ref.__gxx_personality_v0, 4 ; N32: .size DW.ref.__gxx_personality_v0, 4 diff --git a/llvm/test/CodeGen/Mips/emutls_generic.ll b/llvm/test/CodeGen/Mips/emutls_generic.ll index a6cf23aa67f..cda8dec7d12 100644 --- a/llvm/test/CodeGen/Mips/emutls_generic.ll +++ b/llvm/test/CodeGen/Mips/emutls_generic.ll @@ -31,13 +31,13 @@ entry: ; MIPS_32-NOT: __emutls_t.external_x ; MIPS_32-NOT: __emutls_v.external_x: ; MIPS_32: .data -; MIPS_32: .align 2 +; MIPS_32: .p2align 2 ; MIPS_32-LABEL: __emutls_v.external_y: ; MIPS_32: .section .rodata, ; MIPS_32-LABEL: __emutls_t.external_y: ; MIPS_32-NEXT: .byte 7 ; MIPS_32: .data -; MIPS_32: .align 2 +; MIPS_32: .p2align 2 ; MIPS_32-LABEL: __emutls_v.internal_y: ; MIPS_32-NEXT: .4byte 8 ; MIPS_32-NEXT: .4byte 16 @@ -59,7 +59,7 @@ entry: ; MIPS_64-LABEL: __emutls_t.external_y: ; MIPS_64-NEXT: .byte 7 ; MIPS_64: .data -; MIPS_64: .align 3 +; MIPS_64: .p2align 3 ; MIPS_64-LABEL: __emutls_v.internal_y: ; MIPS_64-NEXT: .8byte 8 ; MIPS_64-NEXT: .8byte 16 diff --git a/llvm/test/CodeGen/Mips/lcb5.ll b/llvm/test/CodeGen/Mips/lcb5.ll index ec4c3da6515..83f5fa0fb1c 100644 --- a/llvm/test/CodeGen/Mips/lcb5.ll +++ b/llvm/test/CodeGen/Mips/lcb5.ll @@ -212,7 +212,7 @@ if.end: ; preds = %if.then, %entry ; ci: btnez $BB7_1 # 16 bit inst ; ci: jal $BB7_2 # branch ; ci: nop -; ci: .align 2 +; ci: .p2align 2 ; ci: $BB7_1: ; ci: .end z4 diff --git a/llvm/test/CodeGen/Mips/longbranch.ll b/llvm/test/CodeGen/Mips/longbranch.ll index 9f5b7417b85..2d6986488e1 100644 --- a/llvm/test/CodeGen/Mips/longbranch.ll +++ b/llvm/test/CodeGen/Mips/longbranch.ll @@ -155,7 +155,7 @@ end: ; NACL: lw $[[R1:[0-9]+]], %got(x)($[[GP]]) ; NACL: addiu $[[R2:[0-9]+]], $zero, 1 ; NACL: sw $[[R2]], 0($[[R1]]) -; NACL: .align 4 +; NACL: .p2align 4 ; NACL-NEXT: $[[BB2]]: ; NACL: jr $ra ; NACL: nop diff --git a/llvm/test/CodeGen/Mips/nacl-align.ll b/llvm/test/CodeGen/Mips/nacl-align.ll index 8191c7dec6f..74b6286648d 100644 --- a/llvm/test/CodeGen/Mips/nacl-align.ll +++ b/llvm/test/CodeGen/Mips/nacl-align.ll @@ -7,8 +7,8 @@ define void @test0() { ret void -; CHECK: .align 4 -; CHECK-NOT: .align +; CHECK: .p2align 4 +; CHECK-NOT: .p2align ; CHECK-LABEL: test0: } @@ -40,18 +40,18 @@ default: ; CHECK-LABEL: test1: -; CHECK: .align 4 +; CHECK: .p2align 4 ; CHECK-NEXT: ${{BB[0-9]+_[0-9]+}}: ; CHECK-NEXT: jr $ra ; CHECK-NEXT: addiu $2, $zero, 111 ; CHECK-NEXT: ${{BB[0-9]+_[0-9]+}}: ; CHECK-NEXT: jr $ra ; CHECK-NEXT: addiu $2, $zero, 555 -; CHECK-NEXT: .align 4 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: ${{BB[0-9]+_[0-9]+}}: ; CHECK-NEXT: jr $ra ; CHECK-NEXT: addiu $2, $zero, 222 -; CHECK-NEXT: .align 4 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: ${{BB[0-9]+_[0-9]+}}: ; CHECK-NEXT: jr $ra ; CHECK-NEXT: addiu $2, $zero, 333 @@ -81,12 +81,12 @@ bb2: ; Note that there are two consecutive labels - one temporary and one for ; basic block. -; CHECK: .align 4 +; CHECK: .p2align 4 ; CHECK-NEXT: ${{[a-zA-Z0-9]+}}: ; CHECK-NEXT: ${{BB[0-9]+_[0-9]+}}: ; CHECK-NEXT: jr $ra ; CHECK-NEXT: addiu $2, $zero, 111 -; CHECK-NEXT: .align 4 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: ${{[a-zA-Z0-9]+}}: ; CHECK-NEXT: ${{BB[0-9]+_[0-9]+}}: ; CHECK-NEXT: jr $ra diff --git a/llvm/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll b/llvm/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll index 1ba11d3fd03..160b26e9078 100644 --- a/llvm/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll +++ b/llvm/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll @@ -6,7 +6,7 @@ @_cmd = constant %cmd.type zeroinitializer ; CHECK: .globl __cmd -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: __cmd: ; CHECK-NEXT: .byte 0 diff --git a/llvm/test/CodeGen/PowerPC/align.ll b/llvm/test/CodeGen/PowerPC/align.ll index 0797ca8d0be..52ac2c12e03 100644 --- a/llvm/test/CodeGen/PowerPC/align.ll +++ b/llvm/test/CodeGen/PowerPC/align.ll @@ -9,33 +9,33 @@ ; no alignment @c = global i16 2 -;ELF: .align 1 +;ELF: .p2align 1 ;ELF: c: -;DARWIN: .align 1 +;DARWIN: .p2align 1 ;DARWIN: _c: @d = global i32 3 -;ELF: .align 2 +;ELF: .p2align 2 ;ELF: d: -;DARWIN: .align 2 +;DARWIN: .p2align 2 ;DARWIN: _d: @e = global i64 4 -;ELF: .align 3 +;ELF: .p2align 3 ;ELF: e -;DARWIN: .align 3 +;DARWIN: .p2align 3 ;DARWIN: _e: @f = global float 5.0 -;ELF: .align 2 +;ELF: .p2align 2 ;ELF: f: -;DARWIN: .align 2 +;DARWIN: .p2align 2 ;DARWIN: _f: @g = global double 6.0 -;ELF: .align 3 +;ELF: .p2align 3 ;ELF: g: -;DARWIN: .align 3 +;DARWIN: .p2align 3 ;DARWIN: _g: @bar = common global [75 x i8] zeroinitializer, align 128 diff --git a/llvm/test/CodeGen/PowerPC/code-align.ll b/llvm/test/CodeGen/PowerPC/code-align.ll index 19d1b236ce0..e36f6f9d038 100644 --- a/llvm/test/CodeGen/PowerPC/code-align.ll +++ b/llvm/test/CodeGen/PowerPC/code-align.ll @@ -22,9 +22,9 @@ entry: ; GENERIC-LABEL: .globl foo ; BASIC-LABEL: .globl foo ; PWR-LABEL: .globl foo -; GENERIC: .align 2 -; BASIC: .align 4 -; PWR: .align 4 +; GENERIC: .p2align 2 +; BASIC: .p2align 4 +; PWR: .p2align 4 ; GENERIC: @foo ; BASIC: @foo ; PWR: @foo @@ -41,9 +41,9 @@ entry: ; GENERIC: mtctr ; BASIC: mtctr ; PWR: mtctr -; GENERIC-NOT: .align -; BASIC: .align 4 -; PWR: .align 4 +; GENERIC-NOT: .p2align +; BASIC: .p2align 4 +; PWR: .p2align 4 ; GENERIC: lwzu ; BASIC: lwzu ; PWR: lwzu @@ -83,9 +83,9 @@ entry: ; GENERIC: mtctr ; BASIC: mtctr ; PWR: mtctr -; GENERIC-NOT: .align -; BASIC: .align 4 -; PWR: .align 5 +; GENERIC-NOT: .p2align +; BASIC: .p2align 4 +; PWR: .p2align 5 ; GENERIC: bdnz ; BASIC: bdnz ; PWR: bdnz diff --git a/llvm/test/CodeGen/PowerPC/ppc64-linux-func-size.ll b/llvm/test/CodeGen/PowerPC/ppc64-linux-func-size.ll index fb017bc224b..6f8351bb5bd 100644 --- a/llvm/test/CodeGen/PowerPC/ppc64-linux-func-size.ll +++ b/llvm/test/CodeGen/PowerPC/ppc64-linux-func-size.ll @@ -2,7 +2,7 @@ ; CHECK: .section .opd,"aw",@progbits ; CHECK-NEXT: test1: -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .quad .L[[BEGIN:.*]] ; CHECK-NEXT: .quad .TOC.@tocbase ; CHECK-NEXT: .quad 0 diff --git a/llvm/test/CodeGen/PowerPC/ppc64-toc.ll b/llvm/test/CodeGen/PowerPC/ppc64-toc.ll index 7500ed60663..8d35cba2d43 100644 --- a/llvm/test/CodeGen/PowerPC/ppc64-toc.ll +++ b/llvm/test/CodeGen/PowerPC/ppc64-toc.ll @@ -9,7 +9,7 @@ target triple = "powerpc64-unknown-linux-gnu" define i64 @access_int64(i64 %a) nounwind readonly { entry: ; CHECK-LABEL: access_int64: -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .quad .L[[BEGIN:.*]] ; CHECK-NEXT: .quad .TOC.@tocbase ; CHECK-NEXT: .quad 0 diff --git a/llvm/test/CodeGen/Thumb/2010-07-01-FuncAlign.ll b/llvm/test/CodeGen/Thumb/2010-07-01-FuncAlign.ll index 8e09441feba..c132a0a6622 100644 --- a/llvm/test/CodeGen/Thumb/2010-07-01-FuncAlign.ll +++ b/llvm/test/CodeGen/Thumb/2010-07-01-FuncAlign.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s ; Radar 8143571: Function alignments were off by a power of two. -; CHECK: .align 1 +; CHECK: .p2align 1 define void @test() { ret void } diff --git a/llvm/test/CodeGen/Thumb/segmented-stacks.ll b/llvm/test/CodeGen/Thumb/segmented-stacks.ll index 251c2953472..7340842a42f 100644 --- a/llvm/test/CodeGen/Thumb/segmented-stacks.ll +++ b/llvm/test/CodeGen/Thumb/segmented-stacks.ll @@ -32,7 +32,7 @@ define void @test_basic() #0 { ; Thumb-android: pop {r4, r5} -; Thumb-android: .align 2 +; Thumb-android: .p2align 2 ; Thumb-android: .LCPI0_0: ; Thumb-android-NEXT: .long __STACK_LIMIT diff --git a/llvm/test/CodeGen/Thumb2/aligned-constants.ll b/llvm/test/CodeGen/Thumb2/aligned-constants.ll index 13cca113452..df3b19dbb5c 100644 --- a/llvm/test/CodeGen/Thumb2/aligned-constants.ll +++ b/llvm/test/CodeGen/Thumb2/aligned-constants.ll @@ -4,11 +4,11 @@ target triple = "thumbv7-apple-ios" ; The double in the constant pool is 8-byte aligned, forcing the function ; alignment. -; CHECK: .align 3 +; CHECK: .p2align 3 ; CHECK: func ; ; Constant pool with 8-byte entry before 4-byte entry: -; CHECK: .align 3 +; CHECK: .p2align 3 ; CHECK: LCPI ; CHECK: .long 2370821947 ; CHECK: .long 1080815255 diff --git a/llvm/test/CodeGen/Thumb2/thumb2-tbb.ll b/llvm/test/CodeGen/Thumb2/thumb2-tbb.ll index 758f792695f..9e628519913 100644 --- a/llvm/test/CodeGen/Thumb2/thumb2-tbb.ll +++ b/llvm/test/CodeGen/Thumb2/thumb2-tbb.ll @@ -7,7 +7,7 @@ entry: ; CHECK: tbb ; CHECK: .data_region jt8 ; CHECK: .end_data_region -; CHECK-NEXT: .align 1 +; CHECK-NEXT: .p2align 1 switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ] bb: diff --git a/llvm/test/CodeGen/WebAssembly/global.ll b/llvm/test/CodeGen/WebAssembly/global.ll index 413e622aa08..42a8f58251c 100644 --- a/llvm/test/CodeGen/WebAssembly/global.ll +++ b/llvm/test/CodeGen/WebAssembly/global.ll @@ -30,7 +30,7 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { } ; CHECK: .type .Lg,@object -; CHECK: .align 2{{$}} +; CHECK: .p2align 2{{$}} ; CHECK-NEXT: .Lg: ; CHECK-NEXT: .int32 1337{{$}} ; CHECK-NEXT: .size .Lg, 4{{$}} @@ -50,28 +50,28 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { @z = internal global i32 0 ; CHECK-NEXT: .type one,@object -; CHECK-NEXT: .align 2{{$}} +; CHECK-NEXT: .p2align 2{{$}} ; CHECK-NEXT: one: ; CHECK-NEXT: .int32 1{{$}} ; CHECK-NEXT: .size one, 4{{$}} @one = internal global i32 1 ; CHECK: .type answer,@object -; CHECK: .align 2{{$}} +; CHECK: .p2align 2{{$}} ; CHECK-NEXT: answer: ; CHECK-NEXT: .int32 42{{$}} ; CHECK-NEXT: .size answer, 4{{$}} @answer = internal global i32 42 ; CHECK: .type u32max,@object -; CHECK: .align 2{{$}} +; CHECK: .p2align 2{{$}} ; CHECK-NEXT: u32max: ; CHECK-NEXT: .int32 4294967295{{$}} ; CHECK-NEXT: .size u32max, 4{{$}} @u32max = internal global i32 -1 ; CHECK: .type ud64,@object -; CHECK: .align 3{{$}} +; CHECK: .p2align 3{{$}} ; CHECK-NEXT: ud64: ; CHECK-NEXT: .skip 8{{$}} ; CHECK-NEXT: .size ud64, 8{{$}} @@ -86,21 +86,21 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { @z64 = internal global i64 0 ; CHECK: .type twoP32,@object -; CHECK: .align 3{{$}} +; CHECK: .p2align 3{{$}} ; CHECK-NEXT: twoP32: ; CHECK-NEXT: .int64 4294967296{{$}} ; CHECK-NEXT: .size twoP32, 8{{$}} @twoP32 = internal global i64 4294967296 ; CHECK: .type u64max,@object -; CHECK: .align 3{{$}} +; CHECK: .p2align 3{{$}} ; CHECK-NEXT: u64max: ; CHECK-NEXT: .int64 -1{{$}} ; CHECK-NEXT: .size u64max, 8{{$}} @u64max = internal global i64 -1 ; CHECK: .type f32ud,@object -; CHECK: .align 2{{$}} +; CHECK: .p2align 2{{$}} ; CHECK-NEXT: f32ud: ; CHECK-NEXT: .skip 4{{$}} ; CHECK-NEXT: .size f32ud, 4{{$}} @@ -115,21 +115,21 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { @f32z = internal global float 0.0 ; CHECK: .type f32nz,@object -; CHECK: .align 2{{$}} +; CHECK: .p2align 2{{$}} ; CHECK: f32nz: ; CHECK: .int32 2147483648{{$}} ; CHECK: .size f32nz, 4{{$}} @f32nz = internal global float -0.0 ; CHECK: .type f32two,@object -; CHECK: .align 2{{$}} +; CHECK: .p2align 2{{$}} ; CHECK-NEXT: f32two: ; CHECK-NEXT: .int32 1073741824{{$}} ; CHECK-NEXT: .size f32two, 4{{$}} @f32two = internal global float 2.0 ; CHECK: .type f64ud,@object -; CHECK: .align 3{{$}} +; CHECK: .p2align 3{{$}} ; CHECK-NEXT: f64ud: ; CHECK-NEXT: .skip 8{{$}} ; CHECK-NEXT: .size f64ud, 8{{$}} @@ -144,14 +144,14 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { @f64z = internal global double 0.0 ; CHECK: .type f64nz,@object -; CHECK: .align 3{{$}} +; CHECK: .p2align 3{{$}} ; CHECK-NEXT: f64nz: ; CHECK-NEXT: .int64 -9223372036854775808{{$}} ; CHECK-NEXT: .size f64nz, 8{{$}} @f64nz = internal global double -0.0 ; CHECK: .type f64two,@object -; CHECK: .align 3{{$}} +; CHECK: .p2align 3{{$}} ; CHECK-NEXT: f64two: ; CHECK-NEXT: .int64 4611686018427387904{{$}} ; CHECK-NEXT: .size f64two, 8{{$}} @@ -170,7 +170,7 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ; CHECK: .type rom,@object{{$}} ; CHECK: .section .rodata,"a",@progbits{{$}} ; CHECK: .globl rom{{$}} -; CHECK: .align 4{{$}} +; CHECK: .p2align 4{{$}} ; CHECK: rom: ; CHECK: .skip 512{{$}} ; CHECK: .size rom, 512{{$}} @@ -183,7 +183,7 @@ define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { ; CHECK: .type pointer_to_array,@object ; CHECK-NEXT: .section .data.rel.ro,"aw",@progbits ; CHECK-NEXT: .globl pointer_to_array -; CHECK-NEXT: .align 2 +; CHECK-NEXT: .p2align 2 ; CHECK-NEXT: pointer_to_array: ; CHECK-NEXT: .int32 array+4 ; CHECK-NEXT: .size pointer_to_array, 4 diff --git a/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll b/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll index 9ec9b8b0850..0f9a8f57cf2 100644 --- a/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll +++ b/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll @@ -15,7 +15,7 @@ define void @test(i8* %ptr) gc "erlang" { } ; CHECK: .note.gc -; CHECK-NEXT: .align 8 +; CHECK-NEXT: .p2align 3 ; safe point count ; CHECK: .short 1 ; CHECK: .long .Ltmp0 diff --git a/llvm/test/CodeGen/X86/GC/erlang-gc.ll b/llvm/test/CodeGen/X86/GC/erlang-gc.ll index c55b7f6dcf6..c2cb8c7d657 100644 --- a/llvm/test/CodeGen/X86/GC/erlang-gc.ll +++ b/llvm/test/CodeGen/X86/GC/erlang-gc.ll @@ -6,7 +6,7 @@ define i32 @main(i32 %x) nounwind gc "erlang" { ret i32 0 ; CHECK64: .section .note.gc,"",@progbits -; CHECK64-NEXT: .align 8 +; CHECK64-NEXT: .p2align 3 ; CHECK64-NEXT: .short 1 # safe point count ; CHECK64-NEXT: .long .Ltmp0 # safe point address ; CHECK64-NEXT: .short 1 # stack frame size (in words) @@ -14,7 +14,7 @@ define i32 @main(i32 %x) nounwind gc "erlang" { ; CHECK64-NEXT: .short 0 # live root count ; CHECK32: .section .note.gc,"",@progbits -; CHECK32-NEXT: .align 4 +; CHECK32-NEXT: .p2align 2 ; CHECK32-NEXT: .short 1 # safe point count ; CHECK32-NEXT: .long .Ltmp0 # safe point address ; CHECK32-NEXT: .short 3 # stack frame size (in words) diff --git a/llvm/test/CodeGen/X86/GC/ocaml-gc.ll b/llvm/test/CodeGen/X86/GC/ocaml-gc.ll index 37ddaf90bf6..4e4e2e952f7 100644 --- a/llvm/test/CodeGen/X86/GC/ocaml-gc.ll +++ b/llvm/test/CodeGen/X86/GC/ocaml-gc.ll @@ -22,12 +22,12 @@ define i32 @main(i32 %x) nounwind gc "ocaml" { ; CHECK-NEXT: .globl "caml<stdin>__frametable" ; CHECK-NEXT: "caml<stdin>__frametable": ; CHECK-NEXT: .short 1 -; CHECK-NEXT: .align 8 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: # live roots for main ; CHECK-NEXT: .quad .Ltmp0 ; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 0 -; CHECK-NEXT: .align 8 +; CHECK-NEXT: .p2align 3 } declare i32 @foo(i32) diff --git a/llvm/test/CodeGen/X86/alignment.ll b/llvm/test/CodeGen/X86/alignment.ll index 5908c0cde61..acf11fdec49 100644 --- a/llvm/test/CodeGen/X86/alignment.ll +++ b/llvm/test/CodeGen/X86/alignment.ll @@ -6,7 +6,7 @@ ; CHECK: .bss ; CHECK: .globl GlobalA -; CHECK: .align 8 +; CHECK: .p2align 3 ; CHECK: GlobalA: ; CHECK: .zero 384 @@ -29,7 +29,7 @@ @GlobalAS = global { [384 x i8] } zeroinitializer, align 8, section "foo" ; CHECK: .globl GlobalAS -; CHECK: .align 8 +; CHECK: .p2align 3 ; CHECK: GlobalAS: ; CHECK: .zero 384 diff --git a/llvm/test/CodeGen/X86/avoid-loop-align.ll b/llvm/test/CodeGen/X86/avoid-loop-align.ll index d82cf9418e6..9895b30800e 100644 --- a/llvm/test/CodeGen/X86/avoid-loop-align.ll +++ b/llvm/test/CodeGen/X86/avoid-loop-align.ll @@ -4,7 +4,7 @@ ; header in this case. ; CHECK: jmp LBB0_2 -; CHECK: .align +; CHECK: .p2align ; CHECK: LBB0_1: @A = common global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/avx2-vbroadcast.ll b/llvm/test/CodeGen/X86/avx2-vbroadcast.ll index 8fd50ae3015..c8c39763402 100644 --- a/llvm/test/CodeGen/X86/avx2-vbroadcast.ll +++ b/llvm/test/CodeGen/X86/avx2-vbroadcast.ll @@ -643,7 +643,7 @@ define void @crash() nounwind alwaysinline { ; X32-NEXT: je LBB31_1 ; X32-NEXT: ## BB#2: ## %ret ; X32-NEXT: retl -; X32-NEXT: .align 4, 0x90 +; X32-NEXT: .p2align 4, 0x90 ; X32-NEXT: LBB31_1: ## %footer349VF ; X32-NEXT: ## =>This Inner Loop Header: Depth=1 ; X32-NEXT: jmp LBB31_1 @@ -655,7 +655,7 @@ define void @crash() nounwind alwaysinline { ; X64-NEXT: je LBB31_1 ; X64-NEXT: ## BB#2: ## %ret ; X64-NEXT: retq -; X64-NEXT: .align 4, 0x90 +; X64-NEXT: .p2align 4, 0x90 ; X64-NEXT: LBB31_1: ## %footer349VF ; X64-NEXT: ## =>This Inner Loop Header: Depth=1 ; X64-NEXT: jmp LBB31_1 diff --git a/llvm/test/CodeGen/X86/block-placement.ll b/llvm/test/CodeGen/X86/block-placement.ll index 89defa956a4..98d37153876 100644 --- a/llvm/test/CodeGen/X86/block-placement.ll +++ b/llvm/test/CodeGen/X86/block-placement.ll @@ -7,15 +7,15 @@ define i32 @test_ifchains(i32 %i, i32* %a, i32 %b) { ; that is not expected to run. ; CHECK-LABEL: test_ifchains: ; CHECK: %entry -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %else1 -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %else2 -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %else3 -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %else4 -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %exit ; CHECK: %then1 ; CHECK: %then2 @@ -81,11 +81,11 @@ define i32 @test_loop_cold_blocks(i32 %i, i32* %a) { ; Check that we sink cold loop blocks after the hot loop body. ; CHECK-LABEL: test_loop_cold_blocks: ; CHECK: %entry -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %unlikely1 -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %unlikely2 -; CHECK: .align +; CHECK: .p2align ; CHECK: %body1 ; CHECK: %body2 ; CHECK: %body3 @@ -242,7 +242,7 @@ define i32 @test_loop_align(i32 %i, i32* %a) { ; pass. ; CHECK-LABEL: test_loop_align: ; CHECK: %entry -; CHECK: .align [[ALIGN:[0-9]+]], +; CHECK: .p2align [[ALIGN:[0-9]+]], ; CHECK-NEXT: %body ; CHECK: %exit @@ -267,11 +267,11 @@ define i32 @test_nested_loop_align(i32 %i, i32* %a, i32* %b) { ; Check that we provide nested loop body alignment. ; CHECK-LABEL: test_nested_loop_align: ; CHECK: %entry -; CHECK: .align [[ALIGN]], +; CHECK: .p2align [[ALIGN]], ; CHECK-NEXT: %loop.body.1 -; CHECK: .align [[ALIGN]], +; CHECK: .p2align [[ALIGN]], ; CHECK-NEXT: %inner.loop.body -; CHECK-NOT: .align +; CHECK-NOT: .p2align ; CHECK: %exit entry: @@ -943,18 +943,18 @@ define void @benchmark_heapsort(i32 %n, double* nocapture %ra) { ; CHECK: @benchmark_heapsort ; CHECK: %entry ; First rotated loop top. -; CHECK: .align +; CHECK: .p2align ; CHECK: %while.end ; CHECK: %for.cond ; CHECK: %if.then ; CHECK: %if.else ; CHECK: %if.end10 ; Second rotated loop top -; CHECK: .align +; CHECK: .p2align ; CHECK: %if.then24 ; CHECK: %while.cond.outer ; Third rotated loop top -; CHECK: .align +; CHECK: .p2align ; CHECK: %while.cond ; CHECK: %while.body ; CHECK: %land.lhs.true diff --git a/llvm/test/CodeGen/X86/bss_pagealigned.ll b/llvm/test/CodeGen/X86/bss_pagealigned.ll index da95aca110d..4e9f9241011 100644 --- a/llvm/test/CodeGen/X86/bss_pagealigned.ll +++ b/llvm/test/CodeGen/X86/bss_pagealigned.ll @@ -15,7 +15,7 @@ define void @unxlate_dev_mem_ptr(i64 %phis, i8* %addr) nounwind { } @bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096 ; CHECK: .section .bss.page_aligned,"aw",@nobits -; CHECK-NEXT: .align 4096 +; CHECK-NEXT: .p2align 12 ; CHECK-NEXT: bm_pte: ; CHECK-NEXT: .zero 4096 ; CHECK-NEXT: .size bm_pte, 4096 diff --git a/llvm/test/CodeGen/X86/cfstring.ll b/llvm/test/CodeGen/X86/cfstring.ll index 3eeb8d2890c..84032d045fb 100644 --- a/llvm/test/CodeGen/X86/cfstring.ll +++ b/llvm/test/CodeGen/X86/cfstring.ll @@ -10,7 +10,7 @@ ; CHECK-NEXT: L_.str3: ; CHECK: .section __DATA,__cfstring -; CHECK-NEXT: .align 4 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: L__unnamed_cfstring_4: ; CHECK-NEXT: .quad ___CFConstantStringClassReference ; CHECK-NEXT: .long 1992 diff --git a/llvm/test/CodeGen/X86/code_placement_align_all.ll b/llvm/test/CodeGen/X86/code_placement_align_all.ll index 53df9062020..11dc59a3bab 100644 --- a/llvm/test/CodeGen/X86/code_placement_align_all.ll +++ b/llvm/test/CodeGen/X86/code_placement_align_all.ll @@ -1,9 +1,9 @@ ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -align-all-blocks=16 < %s | FileCheck %s ;CHECK-LABEL: foo: -;CHECK: .align 65536, 0x90 -;CHECK: .align 65536, 0x90 -;CHECK: .align 65536, 0x90 +;CHECK: .p2align 16, 0x90 +;CHECK: .p2align 16, 0x90 +;CHECK: .p2align 16, 0x90 ;CHECK: ret define i32 @foo(i32 %t, i32 %l) nounwind readnone ssp uwtable { %1 = icmp eq i32 %t, 0 diff --git a/llvm/test/CodeGen/X86/constructor.ll b/llvm/test/CodeGen/X86/constructor.ll index e7c846045f0..fd94f595005 100644 --- a/llvm/test/CodeGen/X86/constructor.ll +++ b/llvm/test/CodeGen/X86/constructor.ll @@ -16,22 +16,22 @@ entry: } ; CTOR: .section .ctors.65520,"aGw",@progbits,v,comdat -; CTOR-NEXT: .align 8 +; CTOR-NEXT: .p2align 3 ; CTOR-NEXT: .quad g ; CTOR-NEXT: .section .ctors,"aw",@progbits -; CTOR-NEXT: .align 8 +; CTOR-NEXT: .p2align 3 ; CTOR-NEXT: .quad f ; INIT-ARRAY: .section .init_array.15,"aGw",@init_array,v,comdat -; INIT-ARRAY-NEXT: .align 8 +; INIT-ARRAY-NEXT: .p2align 3 ; INIT-ARRAY-NEXT: .quad g ; INIT-ARRAY-NEXT: .section .init_array,"aw",@init_array -; INIT-ARRAY-NEXT: .align 8 +; INIT-ARRAY-NEXT: .p2align 3 ; INIT-ARRAY-NEXT: .quad f ; NACL: .section .init_array.15,"aGw",@init_array,v,comdat -; NACL-NEXT: .align 4 +; NACL-NEXT: .p2align 2 ; NACL-NEXT: .long g ; NACL-NEXT: .section .init_array,"aw",@init_array -; NACL-NEXT: .align 4 +; NACL-NEXT: .p2align 2 ; NACL-NEXT: .long f diff --git a/llvm/test/CodeGen/X86/emutls_generic.ll b/llvm/test/CodeGen/X86/emutls_generic.ll index ba0536f0ec5..16d90001426 100644 --- a/llvm/test/CodeGen/X86/emutls_generic.ll +++ b/llvm/test/CodeGen/X86/emutls_generic.ll @@ -57,7 +57,7 @@ entry: ; X86_32-NOT: __emutls_v.external_x: ; X86_32: .data{{$}} ; X86_32: .globl __emutls_v.external_y -; X86_32: .align 4 +; X86_32: .p2align 2 ; X86_32-LABEL: __emutls_v.external_y: ; X86_32-NEXT: .long 1 ; X86_32-NEXT: .long 2 @@ -68,7 +68,7 @@ entry: ; X86_32-NEXT: .byte 7 ; X86_32: .data{{$}} ; X86_32-NOT: .globl -; X86_32: .align 4 +; X86_32: .p2align 2 ; X86_32-LABEL: __emutls_v.internal_y: ; X86_32-NEXT: .long 8 ; X86_32-NEXT: .long 16 @@ -88,7 +88,7 @@ entry: ; X86_64-NOT: __emutls_t.external_x ; X86_64-NOT: __emutls_v.external_x: ; X86_64: .globl __emutls_v.external_y -; X86_64: .align 8 +; X86_64: .p2align 3 ; X86_64-LABEL: __emutls_v.external_y: ; X86_64-NEXT: .quad 1 ; X86_64-NEXT: .quad 2 @@ -100,7 +100,7 @@ entry: ; X86_64-NEXT: .byte 7 ; X86_64: .data{{$}} ; X86_64-NOT: .globl -; X86_64: .align 8 +; X86_64: .p2align 3 ; X86_64-LABEL: __emutls_v.internal_y: ; X86_64-NEXT: .quad 8 ; X86_64-NEXT: .quad 16 diff --git a/llvm/test/CodeGen/X86/global-sections.ll b/llvm/test/CodeGen/X86/global-sections.ll index 92440f2b331..a18b6626256 100644 --- a/llvm/test/CodeGen/X86/global-sections.ll +++ b/llvm/test/CodeGen/X86/global-sections.ll @@ -241,13 +241,13 @@ bb7: ; DARWIN: .section __DATA,__data{{$}} ; DARWIN: .globl _G10 ; DARWIN: .weak_definition _G10 -; DARWIN: .align 5 +; DARWIN: .p2align 5 ; DARWIN: _G10: ; DARWIN: .space 400 ; LINUX: .bss ; LINUX: .weak G10 -; LINUX: .align 32 +; LINUX: .p2align 5 ; LINUX: G10: ; LINUX: .zero 400 diff --git a/llvm/test/CodeGen/X86/licm-symbol.ll b/llvm/test/CodeGen/X86/licm-symbol.ll index 0f115ddbb6c..050289e27c9 100644 --- a/llvm/test/CodeGen/X86/licm-symbol.ll +++ b/llvm/test/CodeGen/X86/licm-symbol.ll @@ -6,7 +6,7 @@ ; CHECK: pushl ; CHECK: movl $176, %esi ; CHECK: addl L___sF$non_lazy_ptr, %esi -; CHECK: .align 4, 0x90 +; CHECK: .p2align 4, 0x90 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" target triple = "i386-apple-darwin8" diff --git a/llvm/test/CodeGen/X86/osx-private-labels.ll b/llvm/test/CodeGen/X86/osx-private-labels.ll index e30cb4824aa..d7f0251c138 100644 --- a/llvm/test/CodeGen/X86/osx-private-labels.ll +++ b/llvm/test/CodeGen/X86/osx-private-labels.ll @@ -11,7 +11,7 @@ @private2 = private unnamed_addr constant [5 x i16] [i16 116, i16 101, i16 115, i16 116, i16 0] ; CHECK: .section __TEXT,__ustring -; CHECK-NEXT: .align 1 +; CHECK-NEXT: .p2align 1 ; CHECK-NEXT: l_private2: ; There is no dedicated 4 byte strings on MachO. @@ -19,60 +19,60 @@ %struct.NSConstantString = type { i32*, i32, i8*, i32 } @private3 = private constant %struct.NSConstantString { i32* null, i32 1992, i8* null, i32 0 }, section "__DATA,__cfstring" ; CHECK: .section __DATA,__cfstring -; CHECK-NEXT: .align 4 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: L_private3: ; There is no dedicated 1 or 2 byte constant section on MachO. @private4 = private unnamed_addr constant i32 42 ; CHECK: .section __TEXT,__literal4,4byte_literals -; CHECK-NEXT: .align 2 +; CHECK-NEXT: .p2align 2 ; CHECK-NEXT: L_private4: @private5 = private unnamed_addr constant i64 42 ; CHECK: .section __TEXT,__literal8,8byte_literals -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: L_private5: @private6 = private unnamed_addr constant i128 42 ; CHECK: .section __TEXT,__literal16,16byte_literals -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: L_private6: %struct._objc_class = type { i8* } @private7 = private global %struct._objc_class* null, section "__OBJC,__cls_refs,literal_pointers,no_dead_strip" ; CHECK: .section __OBJC,__cls_refs,literal_pointers,no_dead_strip -; CHECK: .align 3 +; CHECK: .p2align 3 ; CHECK: L_private7: @private8 = private global i32* null, section "__DATA,__nl_symbol_ptr,non_lazy_symbol_pointers" ; CHECK: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: L_private8: @private9 = private global i32* null, section "__DATA,__la_symbol_ptr,lazy_symbol_pointers" ; CHECK: .section __DATA,__la_symbol_ptr,lazy_symbol_pointers -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: L_private9: @private10 = private global i32* null, section "__DATA,__mod_init_func,mod_init_funcs" ; CHECK: .section __DATA,__mod_init_func,mod_init_funcs -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: L_private10: @private11 = private global i32* null, section "__DATA,__mod_term_func,mod_term_funcs" ; CHECK: .section __DATA,__mod_term_func,mod_term_funcs -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: L_private11: @private12 = private global i32* null, section "__DATA,__foobar,interposing" ; CHECK: .section __DATA,__foobar,interposing -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: L_private12: @private13 = private global i32 42, section "__DATA, __objc_classlist, regular, no_dead_strip" ; CHECK: .section __DATA,__objc_classlist,regular,no_dead_strip -; CHECK-NEXT: .align 2 +; CHECK-NEXT: .p2align 2 ; CHECK-NEXT: L_private13: @private14 = private global [4 x i8] c"zed\00", section "__TEXT,__objc_classname,cstring_literals" diff --git a/llvm/test/CodeGen/X86/pic.ll b/llvm/test/CodeGen/X86/pic.ll index 73be234db81..f03dc3f4a28 100644 --- a/llvm/test/CodeGen/X86/pic.ll +++ b/llvm/test/CodeGen/X86/pic.ll @@ -192,7 +192,7 @@ bb12: ; LINUX: .LJTI7_0@GOTOFF( ; LINUX: jmpl * -; LINUX: .align 4 +; LINUX: .p2align 2 ; LINUX-NEXT: .LJTI7_0: ; LINUX: .long .LBB7_2@GOTOFF ; LINUX: .long .LBB7_8@GOTOFF diff --git a/llvm/test/CodeGen/X86/postra-licm.ll b/llvm/test/CodeGen/X86/postra-licm.ll index 5c93160125e..329184a88ff 100644 --- a/llvm/test/CodeGen/X86/postra-licm.ll +++ b/llvm/test/CodeGen/X86/postra-licm.ll @@ -70,7 +70,7 @@ bb26.preheader: ; preds = %imix_test.exit bb23: ; preds = %imix_test.exit unreachable ; Verify that there are no loads inside the loop. -; X86-32: .align 4 +; X86-32: .p2align 4 ; X86-32: %bb28 ; X86-32-NOT: (%esp), ; X86-32-NOT: (%ebp), @@ -152,7 +152,7 @@ entry: bb.nph: ; preds = %entry ; X86-64: movq _map_4_to_16@GOTPCREL(%rip) -; X86-64: .align 4 +; X86-64: .p2align 4 %tmp5 = zext i32 undef to i64 ; <i64> [#uses=1] %tmp6 = add i64 %tmp5, 1 ; <i64> [#uses=1] %tmp11 = shl i64 undef, 1 ; <i64> [#uses=1] diff --git a/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll b/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll index 016b0d13fc4..ba8ff1bc181 100644 --- a/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll +++ b/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll @@ -37,7 +37,7 @@ declare noalias i32* @make_data() ; We use to produce a useless copy here and move %data in another temporary register. ; CHECK-NOT: movq [[ARG1]] ; End of the first basic block. -; CHECK: .align +; CHECK: .p2align ; Now check that %data is used in an address computation. ; CHECK: leaq ([[ARG1]] define %struct._list* @make_list(i32* nocapture readonly %data, i32* nocapture %value, i32* nocapture %all) { diff --git a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll index e8da7ab971b..b895e11e4b3 100644 --- a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll +++ b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll @@ -81,7 +81,7 @@ entry: ; CHECK: .section .xdata,"dr" ; CHECK: Lmain$parent_frame_offset = [[reg_offs]] -; CHECK: .align 4 +; CHECK: .p2align 2 ; CHECK: L__ehtable$main ; CHECK-NEXT: .long -1 ; CHECK-NEXT: .long _filt$main diff --git a/llvm/test/CodeGen/X86/stackmap-large-constants.ll b/llvm/test/CodeGen/X86/stackmap-large-constants.ll index a38b9209a1c..0143a4e0fbc 100644 --- a/llvm/test/CodeGen/X86/stackmap-large-constants.ll +++ b/llvm/test/CodeGen/X86/stackmap-large-constants.ll @@ -46,7 +46,7 @@ ; NumLiveOuts ; CHECK-NEXT: .short 0 -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 declare void @llvm.experimental.stackmap(i64, i32, ...) diff --git a/llvm/test/CodeGen/X86/stackmap-liveness.ll b/llvm/test/CodeGen/X86/stackmap-liveness.ll index 599b6265abf..d2dd263a617 100644 --- a/llvm/test/CodeGen/X86/stackmap-liveness.ll +++ b/llvm/test/CodeGen/X86/stackmap-liveness.ll @@ -34,7 +34,7 @@ entry: ; Num LiveOut Entries: 0 ; CHECK-NEXT: .short 0 ; Align -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; StackMap 1 (patchpoint liveness information enabled) ; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness @@ -49,7 +49,7 @@ entry: ; PATCH-NEXT: .byte 0 ; PATCH-NEXT: .byte 16 ; Align -; PATCH-NEXT: .align 3 +; PATCH-NEXT: .p2align 3 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 12, i8* null, i32 0) %a2 = call i64 asm sideeffect "", "={r8}"() nounwind %a3 = call i8 asm sideeffect "", "={ah}"() nounwind @@ -65,7 +65,7 @@ entry: ; Num LiveOut Entries: 0 ; CHECK-NEXT: .short 0 ; Align -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; StackMap 2 (patchpoint liveness information enabled) ; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness @@ -96,7 +96,7 @@ entry: ; PATCH-NEXT: .byte 0 ; PATCH-NEXT: .byte 16 ; Align -; PATCH-NEXT: .align 3 +; PATCH-NEXT: .p2align 3 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 2, i32 12, i8* null, i32 0) call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind @@ -109,7 +109,7 @@ entry: ; Num LiveOut Entries: 0 ; CHECK-NEXT: .short 0 ; Align -; CHECK-NEXT: .align 3 +; CHECK-NEXT: .p2align 3 ; StackMap 3 (patchpoint liveness information enabled) ; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness @@ -128,7 +128,7 @@ entry: ; PATCH-NEXT: .byte 0 ; PATCH-NEXT: .byte 16 ; Align -; PATCH-NEXT: .align 3 +; PATCH-NEXT: .p2align 3 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 12, i8* null, i32 0) call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind ret void @@ -146,7 +146,7 @@ entry: ; Num LiveOut Entries: 0 ; PATCH-NEXT: .short 0 ; Align -; PATCH-NEXT: .align 3 +; PATCH-NEXT: .p2align 3 ; StackMap 5 (patchpoint liveness information enabled) ; PATCH-LABEL: .long L{{.*}}-_mixed_liveness @@ -165,7 +165,7 @@ entry: ; PATCH-NEXT: .byte 0 ; PATCH-NEXT: .byte 16 ; Align -; PATCH-NEXT: .align 3 +; PATCH-NEXT: .p2align 3 call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 5) call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 5, i32 0, i8* null, i32 0) call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind diff --git a/llvm/test/CodeGen/X86/statepoint-allocas.ll b/llvm/test/CodeGen/X86/statepoint-allocas.ll index fa2621e7d2f..040ab614d0a 100644 --- a/llvm/test/CodeGen/X86/statepoint-allocas.ll +++ b/llvm/test/CodeGen/X86/statepoint-allocas.ll @@ -96,7 +96,7 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3 ; No Padding or LiveOuts ; CHECK: .short 0 ; CHECK: .short 0 -; CHECK: .align 8 +; CHECK: .p2align 3 ; The Deopt one ; CHECK: .long .Ltmp3-test2 @@ -126,5 +126,5 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3 ; No Padding or LiveOuts ; CHECK: .short 0 ; CHECK: .short 0 -; CHECK: .align 8 +; CHECK: .p2align 3 diff --git a/llvm/test/CodeGen/X86/statepoint-invoke.ll b/llvm/test/CodeGen/X86/statepoint-invoke.ll index 1d38b2facc7..3e8b8ca49f1 100644 --- a/llvm/test/CodeGen/X86/statepoint-invoke.ll +++ b/llvm/test/CodeGen/X86/statepoint-invoke.ll @@ -41,7 +41,7 @@ exceptional_return: ; CHECK: .long .Ltmp{{[0-9]+}}-.Ltmp{{[0-9]+}} ; CHECK: .long .Ltmp{{[0-9]+}}-.Lfunc_begin{{[0-9]+}} ; CHECK: .byte 0 -; CHECK: .align 4 +; CHECK: .p2align 4 define i64 addrspace(1)* @test_result(i64 addrspace(1)* %obj, i64 addrspace(1)* %obj1) @@ -71,7 +71,7 @@ exceptional_return: ; CHECK: .long .Ltmp{{[0-9]+}}-.Ltmp{{[0-9]+}} ; CHECK: .long .Ltmp{{[0-9]+}}-.Lfunc_begin{{[0-9]+}} ; CHECK: .byte 0 -; CHECK: .align 4 +; CHECK: .p2align 4 define i64 addrspace(1)* @test_same_val(i1 %cond, i64 addrspace(1)* %val1, i64 addrspace(1)* %val2, i64 addrspace(1)* %val3) gc "statepoint-example" personality i32 ()* @"personality_function" { diff --git a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll index 4f8b2ce6efd..9632360d723 100644 --- a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll +++ b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll @@ -168,7 +168,7 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32) ; No Padding or LiveOuts ; CHECK: .short 0 ; CHECK: .short 0 -; CHECK: .align 8 +; CHECK: .p2align 3 ; ; test_derived_arg @@ -235,7 +235,7 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32) ; No Padding or LiveOuts ; CHECK: .short 0 ; CHECK: .short 0 -; CHECK: .align 8 +; CHECK: .p2align 3 ; Records for the test_id function: @@ -275,5 +275,5 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32) ; No padding or LiveOuts ; CHECK: .short 0 ; CHECK: .short 0 -; CHECK: .align 8 +; CHECK: .p2align 3 diff --git a/llvm/test/CodeGen/X86/tls-android.ll b/llvm/test/CodeGen/X86/tls-android.ll index 4156c7b3f5b..53717f564fa 100644 --- a/llvm/test/CodeGen/X86/tls-android.ll +++ b/llvm/test/CodeGen/X86/tls-android.ll @@ -37,7 +37,7 @@ entry: ; CHECK-NOT: __emutls_v.external_x: -; CHECK: .align 4 +; CHECK: .p2align 2 ; CHECK-LABEL: __emutls_v.external_y: ; CHECK-NEXT: .long 4 ; CHECK-NEXT: .long 4 @@ -46,7 +46,7 @@ entry: ; CHECK-LABEL: __emutls_t.external_y: ; CHECK-NEXT: .long 7 -; CHECK: .align 4 +; CHECK: .p2align 2 ; CHECK-LABEL: __emutls_v.internal_y: ; CHECK-NEXT: .long 4 ; CHECK-NEXT: .long 4 @@ -70,7 +70,7 @@ entry: ; X64-NOT: __emutls_v.external_x: -; X64: .align 8 +; X64: .p2align 3 ; X64-LABEL: __emutls_v.external_y: ; X64-NEXT: .quad 4 ; X64-NEXT: .quad 4 @@ -79,7 +79,7 @@ entry: ; X64-LABEL: __emutls_t.external_y: ; X64-NEXT: .long 7 -; X64: .align 8 +; X64: .p2align 3 ; X64-LABEL: __emutls_v.internal_y: ; X64-NEXT: .quad 4 ; X64-NEXT: .quad 4 diff --git a/llvm/test/CodeGen/X86/unaligned-load.ll b/llvm/test/CodeGen/X86/unaligned-load.ll index ffbbcff2e5d..644a3644730 100644 --- a/llvm/test/CodeGen/X86/unaligned-load.ll +++ b/llvm/test/CodeGen/X86/unaligned-load.ll @@ -30,8 +30,8 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, ; COREI7: movups _.str3 ; CORE2: .section -; CORE2: .align 3 +; CORE2: .p2align 3 ; CORE2-NEXT: _.str1: ; CORE2-NEXT: .asciz "DHRYSTONE PROGRAM, SOME STRING" -; CORE2: .align 3 +; CORE2: .p2align 3 ; CORE2-NEXT: _.str3: diff --git a/llvm/test/CodeGen/X86/utf16-cfstrings.ll b/llvm/test/CodeGen/X86/utf16-cfstrings.ll index 5f0e78fccc6..773efbcdefa 100644 --- a/llvm/test/CodeGen/X86/utf16-cfstrings.ll +++ b/llvm/test/CodeGen/X86/utf16-cfstrings.ll @@ -9,7 +9,7 @@ @_unnamed_cfstring_ = private constant %struct.NSConstantString { i32* getelementptr inbounds ([0 x i32], [0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 2000, i8* bitcast ([5 x i16]* @.str to i8*), i64 4 }, section "__DATA,__cfstring" ; CHECK: .section __TEXT,__ustring -; CHECK-NEXT: .align 1 +; CHECK-NEXT: .p2align 1 ; CHECK-NEXT: _.str: ; CHECK-NEXT: .short 252 ## 0xfc ; CHECK-NEXT: .short 98 ## 0x62 diff --git a/llvm/test/CodeGen/X86/win-cleanuppad.ll b/llvm/test/CodeGen/X86/win-cleanuppad.ll index 4b0a543a876..add6f966e15 100644 --- a/llvm/test/CodeGen/X86/win-cleanuppad.ll +++ b/llvm/test/CodeGen/X86/win-cleanuppad.ll @@ -163,7 +163,7 @@ cleanup.outer: ; preds = %invoke.cont.1, %c ; X64: retq ; X64: .section .xdata,"dr" -; X64-NEXT: .align 4 +; X64-NEXT: .p2align 2 ; X64: $cppxdata$nested_cleanup: ; X64-NEXT: .long 429065506 ; X64-NEXT: .long 2 diff --git a/llvm/test/CodeGen/X86/win32-eh.ll b/llvm/test/CodeGen/X86/win32-eh.ll index 73c7b486a55..9c43264f1b4 100644 --- a/llvm/test/CodeGen/X86/win32-eh.ll +++ b/llvm/test/CodeGen/X86/win32-eh.ll @@ -125,7 +125,7 @@ catch: ; CHECK: retl ; CHECK: .section .xdata,"dr" -; CHECK: .align 4 +; CHECK: .p2align 2 ; CHECK-LABEL: L__ehtable$use_CxxFrameHandler3: ; CHECK-NEXT: .long 429065506 ; CHECK-NEXT: .long 2 diff --git a/llvm/test/CodeGen/X86/win_cst_pool.ll b/llvm/test/CodeGen/X86/win_cst_pool.ll index 77c37b4d348..e8624a69fa2 100644 --- a/llvm/test/CodeGen/X86/win_cst_pool.ll +++ b/llvm/test/CodeGen/X86/win_cst_pool.ll @@ -7,7 +7,7 @@ define double @double() { } ; CHECK: .globl __real@0000000000800000 ; CHECK-NEXT: .section .rdata,"dr",discard,__real@0000000000800000 -; CHECK-NEXT: .align 8 +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: __real@0000000000800000: ; CHECK-NEXT: .quad 8388608 ; CHECK: double: @@ -19,7 +19,7 @@ define <4 x i32> @vec1() { } ; CHECK: .globl __xmm@00000000000000010000000200000003 ; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000010000000200000003 -; CHECK-NEXT: .align 16 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: __xmm@00000000000000010000000200000003: ; CHECK-NEXT: .long 3 ; CHECK-NEXT: .long 2 @@ -34,7 +34,7 @@ define <8 x i16> @vec2() { } ; CHECK: .globl __xmm@00000001000200030004000500060007 ; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000001000200030004000500060007 -; CHECK-NEXT: .align 16 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: __xmm@00000001000200030004000500060007: ; CHECK-NEXT: .short 7 ; CHECK-NEXT: .short 6 @@ -54,7 +54,7 @@ define <4 x float> @undef1() { ; CHECK: .globl __xmm@00000000000000003f8000003f800000 ; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000003f8000003f800000 -; CHECK-NEXT: .align 16 +; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: __xmm@00000000000000003f8000003f800000: ; CHECK-NEXT: .long 1065353216 # float 1 ; CHECK-NEXT: .long 1065353216 # float 1 @@ -73,7 +73,7 @@ define float @pr23966(i32 %a) { ; CHECK: .globl __real@bf8000003f800000 ; CHECK-NEXT: .section .rdata,"dr",discard,__real@bf8000003f800000 -; CHECK-NEXT: .align 4 +; CHECK-NEXT: .p2align 2 ; CHECK-NEXT: __real@bf8000003f800000: ; CHECK-NEXT: .long 1065353216 ; CHECK-NEXT: .long 3212836864 diff --git a/llvm/test/CodeGen/XCore/align.ll b/llvm/test/CodeGen/XCore/align.ll index 2878a648e09..53efa396290 100644 --- a/llvm/test/CodeGen/XCore/align.ll +++ b/llvm/test/CodeGen/XCore/align.ll @@ -1,13 +1,13 @@ ; RUN: llc < %s -march=xcore | FileCheck %s -; CHECK: .align 4 +; CHECK: .p2align 2 ; CHECK-LABEL: f: define void @f() nounwind { entry: ret void } -; CHECK: .align 2 +; CHECK: .p2align 1 ; CHECK-LABEL: g: define void @g() nounwind optsize { entry: diff --git a/llvm/test/CodeGen/XCore/epilogue_prologue.ll b/llvm/test/CodeGen/XCore/epilogue_prologue.ll index 923cc4a09e0..b6813f28558 100644 --- a/llvm/test/CodeGen/XCore/epilogue_prologue.ll +++ b/llvm/test/CodeGen/XCore/epilogue_prologue.ll @@ -101,7 +101,7 @@ entry: ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1 ; CHECKFP: .section .cp.rodata.cst4,"aMc",@progbits,4 -; CHECKFP-NEXT: .align 4 +; CHECKFP-NEXT: .p2align 2 ; CHECKFP-NEXT: .LCPI[[CNST0:[0-9_]+]]: ; CHECKFP-NEXT: .long 200002 ; CHECKFP-NEXT: .LCPI[[CNST1:[0-9_]+]]: @@ -154,7 +154,7 @@ entry: ; ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4 -; CHECK-NEXT: .align 4 +; CHECK-NEXT: .p2align 2 ; CHECK-NEXT: .LCPI[[CNST0:[0-9_]+]]: ; CHECK-NEXT: .long 200003 ; CHECK-NEXT: .LCPI[[CNST1:[0-9_]+]]: diff --git a/llvm/test/CodeGen/XCore/scavenging.ll b/llvm/test/CodeGen/XCore/scavenging.ll index 7b6f54ebec2..b46c75a4aaf 100644 --- a/llvm/test/CodeGen/XCore/scavenging.ll +++ b/llvm/test/CodeGen/XCore/scavenging.ll @@ -53,7 +53,7 @@ declare void @g(i32*, i32*) ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4 -; CHECK: .align 4 +; CHECK: .p2align 2 ; CHECK: [[ARG5:.LCPI[0-9_]+]]: ; CHECK: .long 100003 ; CHECK: [[INDEX0:.LCPI[0-9_]+]]: |
