diff options
| -rw-r--r-- | llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir | 37 |
2 files changed, 33 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp index 456411682ca..01dfd4dc195 100644 --- a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp +++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp @@ -84,8 +84,8 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { .libcallFor({s64}); getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR}) - .legalFor({s32, s32}) - .minScalar(1, s32); + .legalFor({{s32, s32}}) + .clampScalar(1, s32, s32); getActionDefinitionsBuilder(G_ICMP) .legalForCartesianProduct({s32}, {s32, p0}) diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir index 1e5d50f3d51..e0e230d594f 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir @@ -20,6 +20,7 @@ define void @shl(i32) {entry: ret void} define void @ashr(i32) {entry: ret void} define void @lshr(i32) {entry: ret void} + define void @lshr_i64_shift_amount(i32) {entry: ret void} define void @shlv(i32, i32) {entry: ret void} define void @ashrv(i32, i32) {entry: ret void} define void @lshrv(i32, i32) {entry: ret void} @@ -451,7 +452,7 @@ body: | ; MIPS32: liveins: $a0 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 - ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]] + ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32) ; MIPS32: $v0 = COPY [[SHL]](s32) ; MIPS32: RetRA implicit $v0 %0:_(s32) = COPY $a0 @@ -473,7 +474,7 @@ body: | ; MIPS32: liveins: $a0 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 - ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]] + ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32) ; MIPS32: $v0 = COPY [[ASHR]](s32) ; MIPS32: RetRA implicit $v0 %0:_(s32) = COPY $a0 @@ -495,7 +496,7 @@ body: | ; MIPS32: liveins: $a0 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 - ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]] + ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) ; MIPS32: $v0 = COPY [[LSHR]](s32) ; MIPS32: RetRA implicit $v0 %0:_(s32) = COPY $a0 @@ -506,6 +507,30 @@ body: | ... --- +name: lshr_i64_shift_amount +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: lshr_i64_shift_amount + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 + ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) + ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]](s32) + ; MIPS32: $v0 = COPY [[LSHR]](s32) + ; MIPS32: RetRA implicit $v0 + %0:_(s32) = COPY $a0 + %1:_(s64) = G_CONSTANT i64 1 + %2:_(s32) = G_LSHR %0, %1 + $v0 = COPY %2(s32) + RetRA implicit $v0 + +... +--- name: shlv alignment: 2 tracksRegLiveness: true @@ -517,7 +542,7 @@ body: | ; MIPS32: liveins: $a0, $a1 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 - ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]] + ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]](s32) ; MIPS32: $v0 = COPY [[SHL]](s32) ; MIPS32: RetRA implicit $v0 %0:_(s32) = COPY $a0 @@ -539,7 +564,7 @@ body: | ; MIPS32: liveins: $a0, $a1 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 - ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]] + ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]](s32) ; MIPS32: $v0 = COPY [[ASHR]](s32) ; MIPS32: RetRA implicit $v0 %0:_(s32) = COPY $a0 @@ -561,7 +586,7 @@ body: | ; MIPS32: liveins: $a0, $a1 ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 - ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]] + ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]](s32) ; MIPS32: $v0 = COPY [[LSHR]](s32) ; MIPS32: RetRA implicit $v0 %0:_(s32) = COPY $a0 |
