diff options
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/fast-isel-inline-asm.ll | 18 |
2 files changed, 23 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index f071efa7b55..ad75e916cef 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1038,6 +1038,11 @@ bool FastISel::SelectCall(const User *I) { // Handle simple inline asms. if (const InlineAsm *IA = dyn_cast<InlineAsm>(Call->getCalledValue())) { + // If the inline asm has side effects, then make sure that no local value + // lives across by flushing the local value map. + if (IA->hasSideEffects()) + flushLocalValueMap(); + // Don't attempt to handle constraints. if (!IA->getConstraintString().empty()) return false; diff --git a/llvm/test/CodeGen/ARM/fast-isel-inline-asm.ll b/llvm/test/CodeGen/ARM/fast-isel-inline-asm.ll new file mode 100644 index 00000000000..2eb25ec7738 --- /dev/null +++ b/llvm/test/CodeGen/ARM/fast-isel-inline-asm.ll @@ -0,0 +1,18 @@ +; RUN: llc -fast-isel < %s | FileCheck %s +target datalayout = "e-m:o-p:32:32-i1:8:32-i8:8:32-i16:16:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32" +target triple = "thumbv7-apple-ios5.0.0" + +%0 = type opaque + +; Make sure that the inline asm starts right after the call to bar. +define void @test_inline_asm_sideeffect(%0* %call) { +; CHECK: bl _bar +; CHECK-NEXT: InlineAsm Start + call void @bar() + call void asm sideeffect "mov\09r7, r7\09\09@ marker", ""() + %1 = call %0* bitcast (i8* (i8*)* @foo to %0* (%0*)*)(%0* %call) + ret void +} + +declare i8* @foo(i8*) +declare void @bar() |
