diff options
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 10 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 7 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h | 1 | ||||
-rw-r--r-- | llvm/test/MC/AMDGPU/hsa-exp.s | 3 | ||||
-rw-r--r-- | llvm/test/MC/AMDGPU/hsa.s | 4 |
6 files changed, 12 insertions, 15 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDKernelCodeT.h b/llvm/lib/Target/AMDGPU/AMDKernelCodeT.h index 5d243e949fd..df70a9f8bba 100644 --- a/llvm/lib/Target/AMDGPU/AMDKernelCodeT.h +++ b/llvm/lib/Target/AMDGPU/AMDKernelCodeT.h @@ -551,14 +551,8 @@ typedef struct amd_kernel_code_s { int64_t kernel_code_prefetch_byte_offset; uint64_t kernel_code_prefetch_byte_size; - /// Number of bytes of scratch backing memory required for full - /// occupancy of target chip. This takes into account the number of - /// bytes of scratch per work-item, the wavefront size, the maximum - /// number of wavefronts per CU, and the number of CUs. This is an - /// upper limit on scratch. If the grid being dispatched is small it - /// may only need less than this. If the kernel uses no scratch, or - /// the Finalizer has not computed this value, it must be 0. - uint64_t max_scratch_backing_memory_byte_size; + /// Reserved. Must be 0. + uint64_t reserved0; /// Shader program settings for CS. Contains COMPUTE_PGM_RSRC1 and /// COMPUTE_PGM_RSRC2 registers. diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index aaf3ed1607c..d22a0c90c0d 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -2608,6 +2608,13 @@ bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectISA() { bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID, amd_kernel_code_t &Header) { + // max_scratch_backing_memory_byte_size is deprecated. Ignore it while parsing + // assembly for backwards compatibility. + if (ID == "max_scratch_backing_memory_byte_size") { + Parser.eatToEndOfStatement(); + return false; + } + SmallString<40> ErrStr; raw_svector_ostream Err(ErrStr); if (!parseAmdKernelCodeField(ID, getParser(), Header, Err)) { diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index 4680e5ff5e4..02efecf2631 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -423,7 +423,7 @@ void initDefaultAMDKernelCodeT(amd_kernel_code_t &Header, memset(&Header, 0, sizeof(Header)); Header.amd_kernel_code_version_major = 1; - Header.amd_kernel_code_version_minor = 1; + Header.amd_kernel_code_version_minor = 2; Header.amd_machine_kind = 1; // AMD_MACHINE_KIND_AMDGPU Header.amd_machine_version_major = ISA.Major; Header.amd_machine_version_minor = ISA.Minor; diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h index 991408c81c9..9f0a4d29b5e 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h +++ b/llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h @@ -73,7 +73,6 @@ FIELD2(amd_machine_version_stepping, machine_version_stepping, amd_machine_ve FIELD(kernel_code_entry_byte_offset), FIELD(kernel_code_prefetch_byte_size), -FIELD(max_scratch_backing_memory_byte_size), COMPPGM1(granulated_workitem_vgpr_count, compute_pgm_rsrc1_vgprs, VGPRS), COMPPGM1(granulated_wavefront_sgpr_count, compute_pgm_rsrc1_sgprs, SGPRS), diff --git a/llvm/test/MC/AMDGPU/hsa-exp.s b/llvm/test/MC/AMDGPU/hsa-exp.s index 0323056b7bb..b13755a19cc 100644 --- a/llvm/test/MC/AMDGPU/hsa-exp.s +++ b/llvm/test/MC/AMDGPU/hsa-exp.s @@ -65,14 +65,13 @@ amd_kernel_code_t_minimal: // ASM-LABEL: {{^}}amd_kernel_code_t_minimal: // ASM: .amd_kernel_code_t // ASM: amd_code_version_major = 7 -// ASM: amd_code_version_minor = 1 +// ASM: amd_code_version_minor = 2 // ASM: amd_machine_kind = 1 // ASM: amd_machine_version_major = 7 // ASM: amd_machine_version_minor = 0 // ASM: amd_machine_version_stepping = 0 // ASM: kernel_code_entry_byte_offset = 256 // ASM: kernel_code_prefetch_byte_size = 0 -// ASM: max_scratch_backing_memory_byte_size = 0 // ASM: granulated_workitem_vgpr_count = 1 // ASM: granulated_wavefront_sgpr_count = 1 // ASM: priority = 0 diff --git a/llvm/test/MC/AMDGPU/hsa.s b/llvm/test/MC/AMDGPU/hsa.s index 82136fbca8b..5ebc0a60e0f 100644 --- a/llvm/test/MC/AMDGPU/hsa.s +++ b/llvm/test/MC/AMDGPU/hsa.s @@ -135,7 +135,6 @@ amd_kernel_code_t_test_all: // ASM: amd_machine_version_stepping = 5 // ASM: kernel_code_entry_byte_offset = 512 // ASM: kernel_code_prefetch_byte_size = 1 -// ASM: max_scratch_backing_memory_byte_size = 1 // ASM: granulated_workitem_vgpr_count = 1 // ASM: granulated_wavefront_sgpr_count = 1 // ASM: priority = 1 @@ -212,14 +211,13 @@ amd_kernel_code_t_minimal: // ASM-LABEL: {{^}}amd_kernel_code_t_minimal: // ASM: .amd_kernel_code_t // ASM: amd_code_version_major = 1 -// ASM: amd_code_version_minor = 1 +// ASM: amd_code_version_minor = 2 // ASM: amd_machine_kind = 1 // ASM: amd_machine_version_major = 7 // ASM: amd_machine_version_minor = 0 // ASM: amd_machine_version_stepping = 0 // ASM: kernel_code_entry_byte_offset = 256 // ASM: kernel_code_prefetch_byte_size = 0 -// ASM: max_scratch_backing_memory_byte_size = 0 // ASM: granulated_workitem_vgpr_count = 1 // ASM: granulated_wavefront_sgpr_count = 1 // ASM: priority = 0 |