diff options
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 098ca7f06c1..2c9270e00f1 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -684,7 +684,6 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N, switch (N->getOpcode()) { default: break; case ISD::SELECT_CC: { - N->dump(); ConstantSDNode *True, *False; // i1 selectcc(l, r, -1, 0, cc) -> i1 setcc(l, r, cc) if ((True = dyn_cast<ConstantSDNode>(N->getOperand(2))) diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index f838701b353..75cff7ebce0 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -281,7 +281,6 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, if (isVOP1(Opcode) || isVOP2(Opcode) || isVOP3(Opcode) || isVOPC(Opcode)) { unsigned ConstantBusCount = 0; unsigned SGPRUsed = AMDGPU::NoRegister; - MI->dump(); for (int i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); if (MO.isReg() && MO.isUse() && |
