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-rw-r--r--llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp14
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir66
2 files changed, 80 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp
index d8f72a9fc8e..98935d1f5a2 100644
--- a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp
@@ -120,6 +120,20 @@ AArch64MachineLegalizer::AArch64MachineLegalizer() {
for (auto Ty : { s8, s16, s32, s64 })
setAction({G_TRUNC, 1, Ty}, Legal);
+ // Conversions
+ for (auto Ty : { s1, s8, s16, s32, s64 }) {
+ setAction({G_FPTOSI, 0, Ty}, Legal);
+ setAction({G_FPTOUI, 0, Ty}, Legal);
+ setAction({G_SITOFP, 1, Ty}, Legal);
+ setAction({G_UITOFP, 1, Ty}, Legal);
+ }
+
+ for (auto Ty : { s32, s64 }) {
+ setAction({G_FPTOSI, 1, Ty}, Legal);
+ setAction({G_FPTOUI, 1, Ty}, Legal);
+ setAction({G_SITOFP, 0, Ty}, Legal);
+ setAction({G_UITOFP, 0, Ty}, Legal);
+ }
// Control-flow
setAction({G_BR, LLT::unsized()}, Legal);
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
index adf85fd9736..ceed2b0a9de 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
@@ -18,6 +18,27 @@ registers:
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
+ - { id: 6, class: _ }
+ - { id: 7, class: _ }
+ - { id: 8, class: _ }
+ - { id: 9, class: _ }
+ - { id: 10, class: _ }
+ - { id: 11, class: _ }
+ - { id: 12, class: _ }
+ - { id: 13, class: _ }
+ - { id: 14, class: _ }
+ - { id: 15, class: _ }
+ - { id: 16, class: _ }
+ - { id: 17, class: _ }
+ - { id: 18, class: _ }
+ - { id: 19, class: _ }
+ - { id: 20, class: _ }
+ - { id: 21, class: _ }
+ - { id: 22, class: _ }
+ - { id: 23, class: _ }
+ - { id: 24, class: _ }
body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
@@ -35,4 +56,49 @@ body: |
G_BRCOND s1 %3, %bb.1.next
bb.1.next:
+ %4(32) = G_TRUNC { s32, s64 } %0
+
+ ; CHECK: %5(1) = G_FPTOSI { s1, s32 } %4
+ ; CHECK: %6(8) = G_FPTOUI { s8, s32 } %4
+ ; CHECK: %7(16) = G_FPTOSI { s16, s32 } %4
+ ; CHECK: %8(32) = G_FPTOUI { s32, s32 } %4
+ ; CHECK: %9(64) = G_FPTOSI { s64, s32 } %4
+ %5(1) = G_FPTOSI { s1, s32 } %4
+ %6(8) = G_FPTOUI { s8, s32 } %4
+ %7(16) = G_FPTOSI { s16, s32 } %4
+ %8(32) = G_FPTOUI { s32, s32 } %4
+ %9(64) = G_FPTOSI { s64, s32 } %4
+
+ ; CHECK: %10(1) = G_FPTOUI { s1, s64 } %0
+ ; CHECK: %11(8) = G_FPTOSI { s8, s64 } %0
+ ; CHECK: %12(16) = G_FPTOUI { s16, s64 } %0
+ ; CHECK: %13(32) = G_FPTOSI { s32, s64 } %0
+ ; CHECK: %14(32) = G_FPTOUI { s64, s64 } %0
+ %10(1) = G_FPTOUI { s1, s64 } %0
+ %11(8) = G_FPTOSI { s8, s64 } %0
+ %12(16) = G_FPTOUI { s16, s64 } %0
+ %13(32) = G_FPTOSI { s32, s64 } %0
+ %14(32) = G_FPTOUI { s64, s64 } %0
+
+ ; CHECK: %15(32) = G_UITOFP { s32, s1 } %5
+ ; CHECK: %16(32) = G_SITOFP { s32, s8 } %11
+ ; CHECK: %17(32) = G_UITOFP { s32, s16 } %7
+ ; CHECK: %18(32) = G_SITOFP { s32, s32 } %4
+ ; CHECK: %19(32) = G_UITOFP { s32, s64 } %0
+ %15(32) = G_UITOFP { s32, s1 } %5
+ %16(32) = G_SITOFP { s32, s8 } %11
+ %17(32) = G_UITOFP { s32, s16 } %7
+ %18(32) = G_SITOFP { s32, s32 } %4
+ %19(32) = G_UITOFP { s32, s64 } %0
+
+ ; CHECK: %20(64) = G_SITOFP { s64, s1 } %5
+ ; CHECK: %21(64) = G_UITOFP { s64, s8 } %11
+ ; CHECK: %22(64) = G_SITOFP { s64, s16 } %7
+ ; CHECK: %23(64) = G_UITOFP { s64, s32 } %4
+ ; CHECK: %24(64) = G_SITOFP { s64, s64 } %0
+ %20(64) = G_SITOFP { s64, s1 } %5
+ %21(64) = G_UITOFP { s64, s8 } %11
+ %22(64) = G_SITOFP { s64, s16 } %7
+ %23(64) = G_UITOFP { s64, s32 } %4
+ %24(64) = G_SITOFP { s64, s64 } %0
...
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