diff options
| -rw-r--r-- | llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h index 568f66c9f63..cdb84eef472 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h @@ -90,7 +90,7 @@ namespace ISD { // Simple binary arithmetic operators. - ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, + ADD, SUB, MUL, MULHU, MULHS, SDIV, UDIV, SREM, UREM, // Bitwise operators. AND, OR, XOR, SHL, SRA, SRL, diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 105d39d1fa5..858b8ddab8e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1130,6 +1130,8 @@ const char *SDNode::getOperationName() const { case ISD::ADD: return "add"; case ISD::SUB: return "sub"; case ISD::MUL: return "mul"; + case ISD::MULHU: return "mulhu"; + case ISD::MULHS: return "mulhs"; case ISD::SDIV: return "sdiv"; case ISD::UDIV: return "udiv"; case ISD::SREM: return "srem"; |
