diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/Regression/CodeGen/ARM/branch.ll | 16 |
2 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index 34b04ffd215..eba7c78aaa0 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -91,6 +91,7 @@ static ARMCC::CondCodes DAGCCToARMCC(ISD::CondCode CC) { case ISD::SETEQ: return ARMCC::EQ; case ISD::SETGE: return ARMCC::GE; case ISD::SETUGE: return ARMCC::CS; + case ISD::SETULT: return ARMCC::CC; } } diff --git a/llvm/test/Regression/CodeGen/ARM/branch.ll b/llvm/test/Regression/CodeGen/ARM/branch.ll index e4ac1af4ce0..57aa179a7cd 100644 --- a/llvm/test/Regression/CodeGen/ARM/branch.ll +++ b/llvm/test/Regression/CodeGen/ARM/branch.ll @@ -1,7 +1,8 @@ ; RUN: llvm-as < %s | llc -march=arm && ; RUN: llvm-as < %s | llc -march=arm | grep bne && ; RUN: llvm-as < %s | llc -march=arm | grep bge && -; RUN: llvm-as < %s | llc -march=arm | grep bcs +; RUN: llvm-as < %s | llc -march=arm | grep bcs && +; RUN: llvm-as < %s | llc -march=arm | grep bcc void %f1(int %a, int %b, int* %v) { entry: @@ -41,3 +42,16 @@ cond_true: ; preds = %entry return: ; preds = %entry ret void } + +void %f4(uint %a, uint %b, int* %v) { +entry: + %tmp = setlt uint %a, %b ; <bool> [#uses=1] + br bool %tmp, label %return, label %cond_true + +cond_true: ; preds = %entry + store int 0, int* %v + ret void + +return: ; preds = %entry + ret void +} |
