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-rw-r--r--llvm/lib/Target/SystemZ/SystemZElimCompare.cpp6
-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelLowering.cpp4
-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelLowering.h4
3 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp b/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
index adddeef0090..4818ed01552 100644
--- a/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
@@ -150,9 +150,9 @@ static bool isLoadAndTestAsCmp(MachineInstr *MI) {
// If we during isel used a load-and-test as a compare with 0, the
// def operand is dead.
return ((MI->getOpcode() == SystemZ::LTEBR ||
- MI->getOpcode() == SystemZ::LTDBR ||
- MI->getOpcode() == SystemZ::LTXBR) &&
- MI->getOperand(0).isDead());
+ MI->getOpcode() == SystemZ::LTDBR ||
+ MI->getOpcode() == SystemZ::LTXBR) &&
+ MI->getOperand(0).isDead());
}
// Return the source register of Compare, which is the unknown value
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 2a2be6563be..b3e2340fee8 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -5620,8 +5620,8 @@ SystemZTargetLowering::emitTransactionBegin(MachineInstr *MI,
MachineBasicBlock *
SystemZTargetLowering::emitLoadAndTestCmp0(MachineInstr *MI,
- MachineBasicBlock *MBB,
- unsigned Opcode) const {
+ MachineBasicBlock *MBB,
+ unsigned Opcode) const {
MachineFunction &MF = *MBB->getParent();
MachineRegisterInfo *MRI = &MF.getRegInfo();
const SystemZInstrInfo *TII =
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.h b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
index 88fd28a575b..8a2839acd24 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.h
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
@@ -531,8 +531,8 @@ private:
unsigned Opcode,
bool NoFloat) const;
MachineBasicBlock *emitLoadAndTestCmp0(MachineInstr *MI,
- MachineBasicBlock *MBB,
- unsigned Opcode) const;
+ MachineBasicBlock *MBB,
+ unsigned Opcode) const;
};
} // end namespace llvm
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