diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll | 15 |
2 files changed, 22 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9db9d11904c..f22e8934fff 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -43505,8 +43505,13 @@ void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op, case 'i': { // Literal immediates are always ok. if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(Op)) { - // Widen to 64 bits here to get it sign extended. - Result = DAG.getTargetConstant(CST->getSExtValue(), SDLoc(Op), MVT::i64); + bool IsBool = CST->getConstantIntValue()->getBitWidth() == 1; + BooleanContent BCont = getBooleanContents(MVT::i64); + ISD::NodeType ExtOpc = IsBool ? getExtendForContent(BCont) + : ISD::SIGN_EXTEND; + int64_t ExtVal = ExtOpc == ISD::ZERO_EXTEND ? CST->getZExtValue() + : CST->getSExtValue(); + Result = DAG.getTargetConstant(ExtVal, SDLoc(Op), MVT::i64); break; } diff --git a/llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll b/llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll new file mode 100644 index 00000000000..4be7d18f8e6 --- /dev/null +++ b/llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll @@ -0,0 +1,15 @@ +; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: .Ltmp[[N:[0-9]+]]: +; CHECK-NEXT: .quad (42+1)-.Ltmp[[N]] + +target triple = "x86_64-unknown-linux-gnu" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect ".quad 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } |
