diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_setcc-2.ll | 379 |
1 files changed, 379 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vec_setcc-2.ll b/llvm/test/CodeGen/X86/vec_setcc-2.ll index ba9ff7722b4..4c226064901 100644 --- a/llvm/test/CodeGen/X86/vec_setcc-2.ll +++ b/llvm/test/CodeGen/X86/vec_setcc-2.ll @@ -183,3 +183,382 @@ entry: %sext = sext <8 x i1> %icmp to <8 x i16> ret <8 x i16> %sext } + +define <16 x i1> @ugt_v16i8_splat(<16 x i8> %x) { +; CHECK-LABEL: ugt_v16i8_splat: +; CHECK: ## %bb.0: +; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [42,42,42,42,42,42,42,42,42,42,42,42,42,42,42,42] +; CHECK-NEXT: pminub %xmm0, %xmm1 +; CHECK-NEXT: pcmpeqb %xmm1, %xmm0 +; CHECK-NEXT: pcmpeqd %xmm1, %xmm1 +; CHECK-NEXT: pxor %xmm1, %xmm0 +; CHECK-NEXT: retq + %cmp = icmp ugt <16 x i8> %x, <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42> + ret <16 x i1> %cmp +} + +define <8 x i1> @ugt_v8i16_splat(<8 x i16> %x) { +; SSE2-LABEL: ugt_v8i16_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ugt_v8i16_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [242,242,242,242,242,242,242,242] +; SSE41-NEXT: pminuw %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqw %xmm1, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ugt <8 x i16> %x, <i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242> + ret <8 x i1> %cmp +} + +define <4 x i1> @ugt_v4i32_splat(<4 x i32> %x) { +; SSE2-LABEL: ugt_v4i32_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ugt_v4i32_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [4294967254,4294967254,4294967254,4294967254] +; SSE41-NEXT: pminud %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ugt <4 x i32> %x, <i32 -42, i32 -42, i32 -42, i32 -42> + ret <4 x i1> %cmp +} + +define <2 x i1> @ugt_v2i64_splat(<2 x i64> %x) { +; SSE2-LABEL: ugt_v2i64_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898] +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: pcmpgtd %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] +; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] +; SSE2-NEXT: pand %xmm3, %xmm1 +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] +; SSE2-NEXT: por %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ugt_v2i64_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE41-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ugt <2 x i64> %x, <i64 442, i64 442> + ret <2 x i1> %cmp +} + +define <16 x i1> @uge_v16i8_splat(<16 x i8> %x) { +; CHECK-LABEL: uge_v16i8_splat: +; CHECK: ## %bb.0: +; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [42,42,42,42,42,42,42,42,42,42,42,42,42,42,42,42] +; CHECK-NEXT: pmaxub %xmm0, %xmm1 +; CHECK-NEXT: pcmpeqb %xmm1, %xmm0 +; CHECK-NEXT: retq + %cmp = icmp uge <16 x i8> %x, <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42> + ret <16 x i1> %cmp +} + +define <8 x i1> @uge_v8i16_splat(<8 x i16> %x) { +; SSE2-LABEL: uge_v8i16_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [242,242,242,242,242,242,242,242] +; SSE2-NEXT: psubusw %xmm0, %xmm1 +; SSE2-NEXT: pxor %xmm0, %xmm0 +; SSE2-NEXT: pcmpeqw %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: uge_v8i16_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [242,242,242,242,242,242,242,242] +; SSE41-NEXT: pmaxuw %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqw %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp uge <8 x i16> %x, <i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242> + ret <8 x i1> %cmp +} + +define <4 x i1> @uge_v4i32_splat(<4 x i32> %x) { +; SSE2-LABEL: uge_v4i32_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483606,2147483606,2147483606,2147483606] +; SSE2-NEXT: pcmpgtd %xmm0, %xmm1 +; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE2-NEXT: pxor %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: uge_v4i32_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [4294967254,4294967254,4294967254,4294967254] +; SSE41-NEXT: pmaxud %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp uge <4 x i32> %x, <i32 -42, i32 -42, i32 -42, i32 -42> + ret <4 x i1> %cmp +} + +define <2 x i1> @uge_v2i64_splat(<2 x i64> %x) { +; SSE2-LABEL: uge_v2i64_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898] +; SSE2-NEXT: movdqa %xmm1, %xmm2 +; SSE2-NEXT: pcmpgtd %xmm0, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] +; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] +; SSE2-NEXT: pand %xmm3, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] +; SSE2-NEXT: por %xmm0, %xmm1 +; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE2-NEXT: pxor %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: uge_v2i64_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [9223372036854776250,9223372036854776250] +; SSE41-NEXT: pcmpgtq %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp uge <2 x i64> %x, <i64 442, i64 442> + ret <2 x i1> %cmp +} + +define <16 x i1> @ult_v16i8_splat(<16 x i8> %x) { +; CHECK-LABEL: ult_v16i8_splat: +; CHECK: ## %bb.0: +; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [42,42,42,42,42,42,42,42,42,42,42,42,42,42,42,42] +; CHECK-NEXT: pmaxub %xmm0, %xmm1 +; CHECK-NEXT: pcmpeqb %xmm1, %xmm0 +; CHECK-NEXT: pcmpeqd %xmm1, %xmm1 +; CHECK-NEXT: pxor %xmm1, %xmm0 +; CHECK-NEXT: retq + %cmp = icmp ult <16 x i8> %x, <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42> + ret <16 x i1> %cmp +} + +define <8 x i1> @ult_v8i16_splat(<8 x i16> %x) { +; SSE2-LABEL: ult_v8i16_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: psubusw {{.*}}(%rip), %xmm0 +; SSE2-NEXT: pxor %xmm1, %xmm1 +; SSE2-NEXT: pcmpeqw %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ult_v8i16_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [242,242,242,242,242,242,242,242] +; SSE41-NEXT: pmaxuw %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqw %xmm1, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ult <8 x i16> %x, <i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242> + ret <8 x i1> %cmp +} + +define <4 x i1> @ult_v4i32_splat(<4 x i32> %x) { +; SSE2-LABEL: ult_v4i32_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483606,2147483606,2147483606,2147483606] +; SSE2-NEXT: pcmpgtd %xmm0, %xmm1 +; SSE2-NEXT: movdqa %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ult_v4i32_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [4294967254,4294967254,4294967254,4294967254] +; SSE41-NEXT: pmaxud %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ult <4 x i32> %x, <i32 -42, i32 -42, i32 -42, i32 -42> + ret <4 x i1> %cmp +} + +define <2 x i1> @ult_v2i64_splat(<2 x i64> %x) { +; SSE2-LABEL: ult_v2i64_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898] +; SSE2-NEXT: movdqa %xmm1, %xmm2 +; SSE2-NEXT: pcmpgtd %xmm0, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] +; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] +; SSE2-NEXT: pand %xmm3, %xmm1 +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] +; SSE2-NEXT: por %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ult_v2i64_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [9223372036854776250,9223372036854776250] +; SSE41-NEXT: pcmpgtq %xmm0, %xmm1 +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ult <2 x i64> %x, <i64 442, i64 442> + ret <2 x i1> %cmp +} + +define <16 x i1> @ule_v16i8_splat(<16 x i8> %x) { +; CHECK-LABEL: ule_v16i8_splat: +; CHECK: ## %bb.0: +; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [42,42,42,42,42,42,42,42,42,42,42,42,42,42,42,42] +; CHECK-NEXT: pminub %xmm0, %xmm1 +; CHECK-NEXT: pcmpeqb %xmm1, %xmm0 +; CHECK-NEXT: retq + %cmp = icmp ule <16 x i8> %x, <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42> + ret <16 x i1> %cmp +} + +define <8 x i1> @ule_v8i16_splat(<8 x i16> %x) { +; SSE2-LABEL: ule_v8i16_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: psubusw {{.*}}(%rip), %xmm0 +; SSE2-NEXT: pxor %xmm1, %xmm1 +; SSE2-NEXT: pcmpeqw %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ule_v8i16_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [242,242,242,242,242,242,242,242] +; SSE41-NEXT: pminuw %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqw %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ule <8 x i16> %x, <i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242, i16 242> + ret <8 x i1> %cmp +} + +define <4 x i1> @ule_v4i32_splat(<4 x i32> %x) { +; SSE2-LABEL: ule_v4i32_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 +; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE2-NEXT: pxor %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ule_v4i32_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [4294967254,4294967254,4294967254,4294967254] +; SSE41-NEXT: pminud %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ule <4 x i32> %x, <i32 -42, i32 -42, i32 -42, i32 -42> + ret <4 x i1> %cmp +} + +define <2 x i1> @ule_v2i64_splat(<2 x i64> %x) { +; SSE2-LABEL: ule_v2i64_splat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002259898,9223372039002259898] +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: pcmpgtd %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] +; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] +; SSE2-NEXT: pand %xmm3, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] +; SSE2-NEXT: por %xmm0, %xmm1 +; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE2-NEXT: pxor %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ule_v2i64_splat: +; SSE41: ## %bb.0: +; SSE41-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE41-NEXT: pcmpgtq {{.*}}(%rip), %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ule <2 x i64> %x, <i64 442, i64 442> + ret <2 x i1> %cmp +} + +define <4 x i1> @ugt_v4i32_nonsplat(<4 x i32> %x) { +; SSE2-LABEL: ugt_v4i32_nonsplat: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: pcmpgtd {{.*}}(%rip), %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ugt_v4i32_nonsplat: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [4294967253,4294967254,4294967255,4294967256] +; SSE41-NEXT: pminud %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ugt <4 x i32> %x, <i32 -43, i32 -42, i32 -41, i32 -40> + ret <4 x i1> %cmp +} + +define <4 x i1> @ugt_v4i32_splat_commute(<4 x i32> %x) { +; SSE2-LABEL: ugt_v4i32_splat_commute: +; SSE2: ## %bb.0: +; SSE2-NEXT: pxor {{.*}}(%rip), %xmm0 +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483652,2147483652,2147483652,2147483652] +; SSE2-NEXT: pcmpgtd %xmm0, %xmm1 +; SSE2-NEXT: movdqa %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: ugt_v4i32_splat_commute: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4] +; SSE41-NEXT: pmaxud %xmm0, %xmm1 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ugt <4 x i32> <i32 4, i32 4, i32 4, i32 4>, %x + ret <4 x i1> %cmp +} + +define <8 x i16> @PR39859(<8 x i16> %x, <8 x i16> %y) { +; SSE2-LABEL: PR39859: +; SSE2: ## %bb.0: +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] +; SSE2-NEXT: pxor %xmm0, %xmm2 +; SSE2-NEXT: pcmpgtw {{.*}}(%rip), %xmm2 +; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pandn %xmm0, %xmm2 +; SSE2-NEXT: por %xmm1, %xmm2 +; SSE2-NEXT: movdqa %xmm2, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: PR39859: +; SSE41: ## %bb.0: +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [42,42,42,42,42,42,42,42] +; SSE41-NEXT: pminuw %xmm0, %xmm3 +; SSE41-NEXT: pcmpeqw %xmm0, %xmm3 +; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE41-NEXT: pxor %xmm3, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm1, %xmm2 +; SSE41-NEXT: movdqa %xmm2, %xmm0 +; SSE41-NEXT: retq + %cmp = icmp ugt <8 x i16> %x, <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42> + %sel = select <8 x i1> %cmp, <8 x i16> %y, <8 x i16> %x + ret <8 x i16> %sel +} + |
