diff options
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/and.ll | 3 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/shift.ll | 20 |
3 files changed, 21 insertions, 8 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp index ca1885a6128..11b7a165d6e 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp @@ -926,6 +926,12 @@ Instruction *InstCombiner::visitShl(BinaryOperator &I) { // (X * C2) << C1 --> X * (C2 << C1) if (match(Op0, m_Mul(m_Value(X), m_Constant(C2)))) return BinaryOperator::CreateMul(X, ConstantExpr::getShl(C2, C1)); + + // shl (zext i1 X), C1 --> select (X, 1 << C1, 0) + if (match(Op0, m_ZExt(m_Value(X))) && X->getType()->isIntOrIntVectorTy(1)) { + auto *NewC = ConstantExpr::getShl(ConstantInt::get(Ty, 1), C1); + return SelectInst::Create(X, NewC, ConstantInt::getNullValue(Ty)); + } } // (1 << (C - x)) -> ((1 << C) >> x) if C is bitwidth - 1 diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll index 4925013b195..025f05793ec 100644 --- a/llvm/test/Transforms/InstCombine/and.ll +++ b/llvm/test/Transforms/InstCombine/and.ll @@ -346,8 +346,7 @@ define i32 @test30(i1 %X) { define i32 @test31(i1 %X) { ; CHECK-LABEL: @test31( -; CHECK-NEXT: [[Y:%.*]] = zext i1 %X to i32 -; CHECK-NEXT: [[Z:%.*]] = shl nuw nsw i32 [[Y]], 4 +; CHECK-NEXT: [[Z:%.*]] = select i1 [[X:%.*]], i32 16, i32 0 ; CHECK-NEXT: ret i32 [[Z]] ; %Y = zext i1 %X to i32 diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll index 885c4f238e0..97871d18f91 100644 --- a/llvm/test/Transforms/InstCombine/shift.ll +++ b/llvm/test/Transforms/InstCombine/shift.ll @@ -1181,8 +1181,7 @@ define <2 x i65> @test_63(<2 x i64> %t) { define i32 @test_shl_zext_bool(i1 %t) { ; CHECK-LABEL: @test_shl_zext_bool( -; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[T:%.*]] to i32 -; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[EXT]], 2 +; CHECK-NEXT: [[SHL:%.*]] = select i1 [[T:%.*]], i32 4, i32 0 ; CHECK-NEXT: ret i32 [[SHL]] ; %ext = zext i1 %t to i32 @@ -1192,8 +1191,7 @@ define i32 @test_shl_zext_bool(i1 %t) { define <2 x i32> @test_shl_zext_bool_splat(<2 x i1> %t) { ; CHECK-LABEL: @test_shl_zext_bool_splat( -; CHECK-NEXT: [[EXT:%.*]] = zext <2 x i1> [[T:%.*]] to <2 x i32> -; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw <2 x i32> [[EXT]], <i32 3, i32 3> +; CHECK-NEXT: [[SHL:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> <i32 8, i32 8>, <2 x i32> zeroinitializer ; CHECK-NEXT: ret <2 x i32> [[SHL]] ; %ext = zext <2 x i1> %t to <2 x i32> @@ -1203,8 +1201,7 @@ define <2 x i32> @test_shl_zext_bool_splat(<2 x i1> %t) { define <2 x i32> @test_shl_zext_bool_vec(<2 x i1> %t) { ; CHECK-LABEL: @test_shl_zext_bool_vec( -; CHECK-NEXT: [[EXT:%.*]] = zext <2 x i1> [[T:%.*]] to <2 x i32> -; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[EXT]], <i32 2, i32 3> +; CHECK-NEXT: [[SHL:%.*]] = select <2 x i1> [[T:%.*]], <2 x i32> <i32 4, i32 8>, <2 x i32> zeroinitializer ; CHECK-NEXT: ret <2 x i32> [[SHL]] ; %ext = zext <2 x i1> %t to <2 x i32> @@ -1212,6 +1209,17 @@ define <2 x i32> @test_shl_zext_bool_vec(<2 x i1> %t) { ret <2 x i32> %shl } +define i32 @test_shl_zext_bool_not_constant(i1 %cmp, i32 %shamt) { +; CHECK-LABEL: @test_shl_zext_bool_not_constant( +; CHECK-NEXT: [[CONV3:%.*]] = zext i1 [[CMP:%.*]] to i32 +; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[CONV3]], [[SHAMT:%.*]] +; CHECK-NEXT: ret i32 [[SHL]] +; + %conv3 = zext i1 %cmp to i32 + %shl = shl i32 %conv3, %shamt + ret i32 %shl +} + define i64 @shl_zext(i32 %t) { ; CHECK-LABEL: @shl_zext( ; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[T:%.*]], 8 |
