diff options
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 3 |
3 files changed, 9 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index 5bd4709343d..7df587273c8 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -62,6 +62,11 @@ namespace X86 { IP_HAS_LOCK = 16, IP_HAS_NOTRACK = 32 }; + + enum OperandType : unsigned { + /// AVX512 embedded rounding control. This should only have values 0-3. + OPERAND_ROUNDING_CONTROL = MCOI::OPERAND_FIRST_TARGET, + }; } // end namespace X86; /// X86II - This namespace holds all of the target specific flags that diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index fd95387b076..353f52a8c20 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -879,7 +879,8 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, if (HasEVEX_RC) { unsigned RcOperand = NumOps-1; assert(RcOperand >= CurOp); - EVEX_rc = MI.getOperand(RcOperand).getImm() & 0x3; + EVEX_rc = MI.getOperand(RcOperand).getImm(); + assert(EVEX_rc <= 3 && "Invalid rounding control!"); } EncodeRC = true; } diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 67ceceb6698..f9e729077f3 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -610,7 +610,8 @@ def AVX512RCOperand : AsmOperandClass { } def AVX512RC : Operand<i32> { let PrintMethod = "printRoundingControl"; - let OperandType = "OPERAND_IMMEDIATE"; + let OperandNamespace = "X86"; + let OperandType = "OPERAND_ROUNDING_CONTROL"; let ParserMatchClass = AVX512RCOperand; } |
