diff options
| -rw-r--r-- | llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp index a4097232d7d..c7d1131d7b8 100644 --- a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp +++ b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp @@ -743,7 +743,8 @@ static bool runOnBasicBlock(MachineBasicBlock *MBB, // of the MachineBasicBlock so that they are named in the order that we sorted // them alphabetically. Eventually we wont need SkipVRegs because we will use // named vregs instead. - NVC.SkipVRegs(); + if (IdempotentInstCount) + NVC.SkipVRegs(); auto MII = MBB->begin(); for (unsigned i = 0; i < IdempotentInstCount && MII != MBB->end(); ++i) { diff --git a/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir b/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir index abb2dde4d9e..629f7aefd6a 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir @@ -1,4 +1,5 @@ # RUN: llc -march=amdgcn -run-pass=none -verify-machineinstrs -o - %s | FileCheck %s +# RUN: llc -march=amdgcn -run-pass mir-canonicalizer -verify-machineinstrs -o - %s # Previously getReservedRegs was called before parsing # machineFunctionInfo, but the AMDGPU implementation depends on |
