diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp index bb803b29f6d..1b2e5e6d0f7 100644 --- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp +++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp @@ -251,6 +251,16 @@ bool SILoadStoreOptimizer::offsetsCanBeCombined(CombineInfo &CI) { bool SILoadStoreOptimizer::findMatchingDSInst(CombineInfo &CI) { MachineBasicBlock::iterator E = CI.I->getParent()->end(); MachineBasicBlock::iterator MBBI = CI.I; + + int AddrIdx = AMDGPU::getNamedOperandIdx(CI.I->getOpcode(), + AMDGPU::OpName::addr); + const MachineOperand &AddrReg0 = CI.I->getOperand(AddrIdx); + + // We only ever merge operations with the same base address register, so don't + // bother scanning forward if there are no other uses. + if (MRI->hasOneNonDBGUse(AddrReg0.getReg())) + return false; + ++MBBI; SmallVector<const MachineOperand *, 8> DefsToMove; @@ -300,9 +310,6 @@ bool SILoadStoreOptimizer::findMatchingDSInst(CombineInfo &CI) { if (addToListsIfDependent(*MBBI, DefsToMove, CI.InstsToMove)) continue; - int AddrIdx = AMDGPU::getNamedOperandIdx(CI.I->getOpcode(), - AMDGPU::OpName::addr); - const MachineOperand &AddrReg0 = CI.I->getOperand(AddrIdx); const MachineOperand &AddrReg1 = MBBI->getOperand(AddrIdx); // Check same base pointer. Be careful of subregisters, which can occur with |
