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-rwxr-xr-xllvm/lib/Target/X86/X86SchedBroadwell.td7
-rw-r--r--llvm/lib/Target/X86/X86SchedHaswell.td7
-rw-r--r--llvm/lib/Target/X86/X86SchedSandyBridge.td10
-rw-r--r--llvm/lib/Target/X86/X86SchedSkylakeClient.td7
-rwxr-xr-xllvm/lib/Target/X86/X86SchedSkylakeServer.td7
-rw-r--r--llvm/test/CodeGen/X86/schedule-x86_32.ll10
-rw-r--r--llvm/test/CodeGen/X86/schedule-x86_64.ll4
7 files changed, 23 insertions, 29 deletions
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
index ea4dda7ccbf..d78a3581849 100755
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -1789,11 +1789,8 @@ def BWWriteResGroup80 : SchedWriteRes<[BWPort23,BWPort0156]> {
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
-def: InstRW<[BWWriteResGroup80], (instregex "LEAVE64",
- "SCASB",
- "SCASL",
- "SCASQ",
- "SCASW")>;
+def: InstRW<[BWWriteResGroup80], (instrs LEAVE, LEAVE64,
+ SCASB, SCASL, SCASQ, SCASW)>;
def BWWriteResGroup81 : SchedWriteRes<[BWPort0,BWPort5,BWPort23]> {
let Latency = 7;
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 2858209f2b8..19064eff750 100644
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -1675,11 +1675,8 @@ def HWWriteResGroup37 : SchedWriteRes<[HWPort23,HWPort0156]> {
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
-def: InstRW<[HWWriteResGroup37], (instregex "LEAVE64",
- "SCASB",
- "SCASL",
- "SCASQ",
- "SCASW")>;
+def: InstRW<[HWWriteResGroup37], (instrs LEAVE, LEAVE64,
+ SCASB, SCASL, SCASQ, SCASW)>;
def HWWriteResGroup38 : SchedWriteRes<[HWPort0,HWPort5,HWPort23]> {
let Latency = 8;
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td
index 0adf9ea3b7c..511a7cab804 100644
--- a/llvm/lib/Target/X86/X86SchedSandyBridge.td
+++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td
@@ -794,8 +794,14 @@ def SBWriteResGroup25 : SchedWriteRes<[SBPort015]> {
let NumMicroOps = 3;
let ResourceCycles = [3];
}
-def: InstRW<[SBWriteResGroup25], (instregex "LEAVE64",
- "XADD(8|16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup25], (instrs XADD8rr, XADD16rr, XADD32rr, XADD64rr)>;
+
+def SBWriteResGroup25_1 : SchedWriteRes<[SBPort23,SBPort015]> {
+ let Latency = 7;
+ let NumMicroOps = 3;
+ let ResourceCycles = [1,2];
+}
+def: InstRW<[SBWriteResGroup25_1], (instrs LEAVE, LEAVE64)>;
def SBWriteResGroup25_2 : SchedWriteRes<[SBPort5,SBPort05]> {
let Latency = 3;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
index 3c268585c47..a3225d39f8a 100644
--- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
@@ -1779,11 +1779,8 @@ def SKLWriteResGroup94 : SchedWriteRes<[SKLPort23,SKLPort0156]> {
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
-def: InstRW<[SKLWriteResGroup94], (instregex "LEAVE64",
- "SCASB",
- "SCASL",
- "SCASQ",
- "SCASW")>;
+def: InstRW<[SKLWriteResGroup94], (instrs LEAVE, LEAVE64,
+ SCASB, SCASL, SCASQ, SCASW)>;
def SKLWriteResGroup95 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort01]> {
let Latency = 7;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
index 9d8a4c5434e..2488467a6ce 100755
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -3709,11 +3709,8 @@ def SKXWriteResGroup99 : SchedWriteRes<[SKXPort23,SKXPort0156]> {
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
-def: InstRW<[SKXWriteResGroup99], (instregex "LEAVE64",
- "SCASB",
- "SCASL",
- "SCASQ",
- "SCASW")>;
+def: InstRW<[SKXWriteResGroup99], (instrs LEAVE, LEAVE64,
+ SCASB, SCASL, SCASQ, SCASW)>;
def SKXWriteResGroup100 : SchedWriteRes<[SKXPort0,SKXPort5,SKXPort015]> {
let Latency = 7;
diff --git a/llvm/test/CodeGen/X86/schedule-x86_32.ll b/llvm/test/CodeGen/X86/schedule-x86_32.ll
index 8f31501bfd5..81f447786cf 100644
--- a/llvm/test/CodeGen/X86/schedule-x86_32.ll
+++ b/llvm/test/CodeGen/X86/schedule-x86_32.ll
@@ -1380,35 +1380,35 @@ define void @test_leave() optsize {
; SANDY-LABEL: test_leave:
; SANDY: # %bb.0:
; SANDY-NEXT: #APP
-; SANDY-NEXT: leave # sched: [1:0.33]
+; SANDY-NEXT: leave # sched: [7:0.67]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_leave:
; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
-; HASWELL-NEXT: leave # sched: [1:0.25]
+; HASWELL-NEXT: leave # sched: [7:0.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [7:1.00]
;
; BROADWELL-LABEL: test_leave:
; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
-; BROADWELL-NEXT: leave # sched: [1:0.25]
+; BROADWELL-NEXT: leave # sched: [7:0.50]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_leave:
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
-; SKYLAKE-NEXT: leave # sched: [1:0.25]
+; SKYLAKE-NEXT: leave # sched: [7:0.50]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_leave:
; SKX: # %bb.0:
; SKX-NEXT: #APP
-; SKX-NEXT: leave # sched: [1:0.25]
+; SKX-NEXT: leave # sched: [7:0.50]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
diff --git a/llvm/test/CodeGen/X86/schedule-x86_64.ll b/llvm/test/CodeGen/X86/schedule-x86_64.ll
index 3792ab80e96..59387c208e9 100644
--- a/llvm/test/CodeGen/X86/schedule-x86_64.ll
+++ b/llvm/test/CodeGen/X86/schedule-x86_64.ll
@@ -7385,7 +7385,7 @@ define void @test_leave() optsize {
; GENERIC-LABEL: test_leave:
; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
-; GENERIC-NEXT: leave # sched: [3:1.00]
+; GENERIC-NEXT: leave # sched: [7:0.67]
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retq # sched: [1:1.00]
;
@@ -7406,7 +7406,7 @@ define void @test_leave() optsize {
; SANDY-LABEL: test_leave:
; SANDY: # %bb.0:
; SANDY-NEXT: #APP
-; SANDY-NEXT: leave # sched: [3:1.00]
+; SANDY-NEXT: leave # sched: [7:0.67]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retq # sched: [1:1.00]
;
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