diff options
| -rw-r--r-- | llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/isel-sink3.ll | 4 |
2 files changed, 3 insertions, 7 deletions
diff --git a/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp b/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp index 367ea1b056c..93252c8b3bd 100644 --- a/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp +++ b/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp @@ -1025,10 +1025,6 @@ bool AddressingModeMatcher::ValueAlreadyLiveAtInst(Value *Val,Value *KnownLive1, -#include "llvm/Support/CommandLine.h" -cl::opt<bool> ENABLECRAZYHACK("enable-smarter-addr-folding", cl::Hidden); - - /// IsProfitableToFoldIntoAddressingMode - It is possible for the addressing /// mode of the machine to fold the specified instruction into a load or store /// that ultimately uses it. However, the specified instruction has multiple @@ -1053,7 +1049,7 @@ cl::opt<bool> ENABLECRAZYHACK("enable-smarter-addr-folding", cl::Hidden); bool AddressingModeMatcher:: IsProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore, ExtAddrMode &AMAfter) { - if (IgnoreProfitability || !ENABLECRAZYHACK) return true; + if (IgnoreProfitability) return true; // AMBefore is the addressing mode before this instruction was folded into it, // and AMAfter is the addressing mode after the instruction was folded. Get diff --git a/llvm/test/CodeGen/X86/isel-sink3.ll b/llvm/test/CodeGen/X86/isel-sink3.ll index a0fba3acc59..75c23c34353 100644 --- a/llvm/test/CodeGen/X86/isel-sink3.ll +++ b/llvm/test/CodeGen/X86/isel-sink3.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -enable-smarter-addr-folding | grep {addl.(%eax), %ecx} -; RUN: llvm-as < %s | llc -enable-smarter-addr-folding | not grep leal +; RUN: llvm-as < %s | llc | grep {addl.(%eax), %ecx} +; RUN: llvm-as < %s | llc | not grep leal ; this should not sink %1 into bb1, that would increase reg pressure. ; rdar://6399178 |
