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-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp3
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.td12
-rw-r--r--llvm/test/MC/Mips/micromips64r6/invalid.s2
-rw-r--r--llvm/test/MC/Mips/mips64r6/invalid.s2
-rw-r--r--llvm/test/MC/Mips/msa/invalid-64.s8
-rw-r--r--llvm/test/MC/Mips/msa/invalid.s8
6 files changed, 28 insertions, 7 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index aea022a336f..8744667f8c5 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -3306,6 +3306,9 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
case Match_UImm2_1:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected immediate in range 1 .. 4");
+ case Match_UImm3_0:
+ return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
+ "expected 3-bit unsigned immediate");
}
llvm_unreachable("Implement any new match types added!");
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index c0e62a56781..ce7674b614e 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -390,10 +390,12 @@ class ConstantUImmAsmOperandClass<int Bits, list<AsmOperandClass> Supers = [],
let DiagnosticType = "UImm" # Bits # "_" # Offset;
}
+def ConstantUImm3AsmOperandClass
+ : ConstantUImmAsmOperandClass<3, []>;
def ConstantUImm2Plus1AsmOperandClass
- : ConstantUImmAsmOperandClass<2, [], 1>;
+ : ConstantUImmAsmOperandClass<2, [ConstantUImm3AsmOperandClass], 1>;
def ConstantUImm2AsmOperandClass
- : ConstantUImmAsmOperandClass<2>;
+ : ConstantUImmAsmOperandClass<2, [ConstantUImm3AsmOperandClass]>;
def ConstantImmzAsmOperandClass : AsmOperandClass {
let Name = "ConstantImmz";
let RenderMethod = "addConstantUImmOperands<1>";
@@ -475,7 +477,7 @@ def uimmz : Operand<i32> {
}
// Unsigned Operands
-foreach I = {2} in
+foreach I = {2, 3} in
def uimm # I : Operand<i32> {
let PrintMethod = "printUnsignedImm";
let ParserMatchClass =
@@ -489,10 +491,6 @@ def uimm2_plus1 : Operand<i32> {
let ParserMatchClass = ConstantUImm2Plus1AsmOperandClass;
}
-def uimm3 : Operand<i32> {
- let PrintMethod = "printUnsignedImm";
-}
-
def uimm5 : Operand<i32> {
let PrintMethod = "printUnsignedImm";
}
diff --git a/llvm/test/MC/Mips/micromips64r6/invalid.s b/llvm/test/MC/Mips/micromips64r6/invalid.s
index 695bab31a2f..d9adcf0af78 100644
--- a/llvm/test/MC/Mips/micromips64r6/invalid.s
+++ b/llvm/test/MC/Mips/micromips64r6/invalid.s
@@ -16,6 +16,8 @@
bnezc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
bnezc16 $6, 31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
bnezc16 $6, 130 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
+ dalign $4, $2, $3, -1 # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
+ dalign $4, $2, $3, 8 # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
lbu16 $9, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
diff --git a/llvm/test/MC/Mips/mips64r6/invalid.s b/llvm/test/MC/Mips/mips64r6/invalid.s
index 63f08dd936e..06c6b2a0dfd 100644
--- a/llvm/test/MC/Mips/mips64r6/invalid.s
+++ b/llvm/test/MC/Mips/mips64r6/invalid.s
@@ -26,6 +26,8 @@ local_label:
bgeul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgtl $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgtul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ dalign $4, $2, $3, -1 # CHECK: :[[@LINE]]:29: error: expected 3-bit unsigned immediate
+ dalign $4, $2, $3, 8 # CHECK: :[[@LINE]]:29: error: expected 3-bit unsigned immediate
dlsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:29: error: expected immediate in range 1 .. 4
dlsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:29: error: expected immediate in range 1 .. 4
lsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:29: error: expected immediate in range 1 .. 4
diff --git a/llvm/test/MC/Mips/msa/invalid-64.s b/llvm/test/MC/Mips/msa/invalid-64.s
index 456ae21814d..7dc906fa365 100644
--- a/llvm/test/MC/Mips/msa/invalid-64.s
+++ b/llvm/test/MC/Mips/msa/invalid-64.s
@@ -13,3 +13,11 @@
insve.d $w3[0], $w18[1] # CHECK: :[[@LINE]]:26: error: expected '0'
lsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
lsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
+ sat_s.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_s.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ srari.b $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srari.b $w5, $w25, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srlri.b $w18, $w3, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srlri.b $w18, $w3, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
diff --git a/llvm/test/MC/Mips/msa/invalid.s b/llvm/test/MC/Mips/msa/invalid.s
index 0875efba877..31eddd87062 100644
--- a/llvm/test/MC/Mips/msa/invalid.s
+++ b/llvm/test/MC/Mips/msa/invalid.s
@@ -11,3 +11,11 @@
insve.d $w3[0], $w18[1] # CHECK: :[[@LINE]]:26: error: expected '0'
lsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
lsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:25: error: expected immediate in range 1 .. 4
+ sat_s.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_s.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.b $w31, $w31, -1 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ sat_u.b $w31, $w31, 8 # CHECK: :[[@LINE]]:25: error: expected 3-bit unsigned immediate
+ srari.b $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srari.b $w5, $w25, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srlri.b $w18, $w3, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
+ srlri.b $w18, $w3, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
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