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-rw-r--r--llvm/test/CodeGen/AMDGPU/load-local-f32-no-ds128.ll20
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/load-local-f32-no-ds128.ll b/llvm/test/CodeGen/AMDGPU/load-local-f32-no-ds128.ll
new file mode 100644
index 00000000000..a7c43417590
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/load-local-f32-no-ds128.ll
@@ -0,0 +1,20 @@
+; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=-enable-ds128 < %s | FileCheck -check-prefixes=SI,GCN %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-enable-ds128 < %s | FileCheck -check-prefixes=CIVI,GCN %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-enable-ds128 < %s | FileCheck -check-prefixes=CIVI,GCN %s
+
+; Test if ds_read/write_b128 doesn't gets generated when the option is
+; disabled.
+; GCN-LABEL: {{^}}local_v4f32_to_2b64
+;
+; SI-NOT: ds_read_b128
+; SI-NOT: ds_write_b128
+;
+; CIVI: ds_read2_b64
+; CIVI: ds_write2_b64
+define amdgpu_kernel void @local_v4f32_to_2b64(<4 x float> addrspace(3)* %out, <4 x float> addrspace(3)* %in) {
+ %ld = load <4 x float>, <4 x float> addrspace(3)* %in, align 16
+ store <4 x float> %ld, <4 x float> addrspace(3)* %out, align 16
+ ret void
+}
+
+attributes #0 = { nounwind }
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