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-rw-r--r--llvm/lib/Target/ARM/ARMCodeEmitter.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
index 3936afc7171..a8fe2ea4f19 100644
--- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -416,7 +416,7 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
const MachineOperand &MO = MI.getOperand(OpIdx);
if (MO.isReg())
// Encode register Rm.
- return Binary | getMachineOpValue(MI, NumDefs + 1);
+ return Binary | getMachineOpValue(MI, NumDefs);
// Encode so_imm.
// Set bit I(25) to identify this is the immediate form of <shifter_op>
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