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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp5
-rw-r--r--llvm/test/CodeGen/X86/atomic-load-store-wide.ll2
-rw-r--r--llvm/test/CodeGen/X86/atomic-non-integer.ll4
3 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index cb19bc2741f..b905d2794d2 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26456,9 +26456,10 @@ static SDValue LowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG,
Ops, MVT::i64,
Node->getMemOperand());
- // If this is a sequentially consistent store, also emit an mfence.
+ // If this is a sequentially consistent store, also emit an appropriate
+ // barrier.
if (IsSeqCst)
- Chain = DAG.getNode(X86ISD::MFENCE, dl, MVT::Other, Chain);
+ Chain = emitLockedStackOp(DAG, Subtarget, Chain, dl);
return Chain;
}
diff --git a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
index f79bd7527ae..bdb88564cf8 100644
--- a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
+++ b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
@@ -11,7 +11,7 @@ define void @test1(i64* %ptr, i64 %val1) {
; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE42-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE42-NEXT: movlps %xmm0, (%eax)
-; SSE42-NEXT: mfence
+; SSE42-NEXT: lock orl $0, (%esp)
; SSE42-NEXT: retl
;
; NOSSE-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/atomic-non-integer.ll b/llvm/test/CodeGen/X86/atomic-non-integer.ll
index 39446c40e5b..d40eb76315f 100644
--- a/llvm/test/CodeGen/X86/atomic-non-integer.ll
+++ b/llvm/test/CodeGen/X86/atomic-non-integer.ll
@@ -710,7 +710,7 @@ define void @store_double_seq_cst(double* %fptr, double %v) {
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; X86-SSE2-NEXT: movlps %xmm0, (%eax)
-; X86-SSE2-NEXT: mfence
+; X86-SSE2-NEXT: lock orl $0, (%esp)
; X86-SSE2-NEXT: retl
;
; X86-AVX-LABEL: store_double_seq_cst:
@@ -718,7 +718,7 @@ define void @store_double_seq_cst(double* %fptr, double %v) {
; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; X86-AVX-NEXT: vmovlps %xmm0, (%eax)
-; X86-AVX-NEXT: mfence
+; X86-AVX-NEXT: lock orl $0, (%esp)
; X86-AVX-NEXT: retl
;
; X86-NOSSE-LABEL: store_double_seq_cst:
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