diff options
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 1 | ||||
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir | 61 |
2 files changed, 52 insertions, 10 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index e2448522c67..c08e33fce3a 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -50,6 +50,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() { setAction({G_CONSTANT, S64}, Legal); setAction({G_FCONSTANT, S32}, Legal); + setAction({G_FCONSTANT, S64}, Legal); setAction({G_FADD, S32}, Legal); diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir index 860be0719a8..67f3e4940e3 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir @@ -2,13 +2,19 @@ # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s --- | - define void @test_constant() { - entry: + define void @test_constant_i32() { ret void } - define void @test_fconstant() { - entry: + define void @test_constant_i64() { + ret void + } + + define void @test_fconstant_f32() { + ret void + } + + define void @test_fconstant_f64() { ret void } @@ -19,14 +25,14 @@ ... --- -name: test_constant +name: test_constant_i32 registers: - { id: 0, class: _ } - { id: 1, class: _ } body: | - bb.0.entry: + bb.0: - ; CHECK-LABEL: name: test_constant + ; CHECK-LABEL: name: test_constant_i32 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 ; CHECK: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 false ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C1]](s1), [[C1]](s1) @@ -34,20 +40,55 @@ body: | %1(s1) = G_CONSTANT i1 0 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.f32), %0, %0, %0, %0, %0, %0, %1, %1; ... +--- +name: test_constant_i64 +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } +body: | + bb.0: + ; CHECK-LABEL: name: test_constant_i64 + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5 + ; CHECK: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 false + ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C1]](s1), [[C1]](s1) + %0(s32) = G_CONSTANT i32 5 + %1(s1) = G_CONSTANT i1 0 + G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.f32), %0, %0, %0, %0, %0, %0, %1, %1; +... --- -name: test_fconstant +name: test_fconstant_f32 registers: - { id: 0, class: _ } - { id: 1, class: _ } body: | - bb.0.entry: + bb.0: - ; CHECK-LABEL: name: test_fconstant + ; CHECK-LABEL: name: test_fconstant_f32 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00 + ; CHECK: $vgpr0 = COPY [[C]](s32) ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 7.500000e+00 + ; CHECK: $vgpr0 = COPY [[C1]](s32) %0(s32) = G_FCONSTANT float 1.0 $vgpr0 = COPY %0 %1(s32) = G_FCONSTANT float 7.5 $vgpr0 = COPY %1 ... +--- +name: test_fconstant_f64 +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } +body: | + bb.0: + + ; CHECK-LABEL: name: test_fconstant_f64 + ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00 + ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64) + ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 7.500000e+00 + ; CHECK: $vgpr0_vgpr1 = COPY [[C1]](s64) + %0(s64) = G_FCONSTANT double 1.0 + $vgpr0_vgpr1 = COPY %0 + %1(s64) = G_FCONSTANT double 7.5 + $vgpr0_vgpr1 = COPY %1 +... |