diff options
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index c4287b09780..4127feda0e8 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -148,6 +148,8 @@ class VectorLegalizer { SDValue ExpandFixedPointMul(SDValue Op); SDValue ExpandStrictFPOp(SDValue Op); + SDValue UnrollStrictFPOp(SDValue Op); + /// Implements vector promotion. /// /// This is essentially just bitcasting the operands to a different type and @@ -1208,8 +1210,11 @@ SDValue VectorLegalizer::ExpandUINT_TO_FLOAT(SDValue Op) { TargetLowering::Expand) || (IsStrict && TLI.getOperationAction(ISD::STRICT_SINT_TO_FP, VT) == TargetLowering::Expand)) || - TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Expand) - return IsStrict ? SDValue() : DAG.UnrollVectorOp(Op.getNode()); + TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Expand) { + if (IsStrict) + return UnrollStrictFPOp(Op); + return DAG.UnrollVectorOp(Op.getNode()); + } unsigned BW = VT.getScalarSizeInBits(); assert((BW == 64 || BW == 32) && @@ -1386,11 +1391,13 @@ SDValue VectorLegalizer::ExpandFixedPointMul(SDValue Op) { } SDValue VectorLegalizer::ExpandStrictFPOp(SDValue Op) { - if (Op.getOpcode() == ISD::STRICT_UINT_TO_FP) { - if (SDValue Res = ExpandUINT_TO_FLOAT(Op)) - return Res; - } + if (Op.getOpcode() == ISD::STRICT_UINT_TO_FP) + return ExpandUINT_TO_FLOAT(Op); + + return UnrollStrictFPOp(Op); +} +SDValue VectorLegalizer::UnrollStrictFPOp(SDValue Op) { EVT VT = Op.getValue(0).getValueType(); EVT EltVT = VT.getVectorElementType(); unsigned NumElems = VT.getVectorNumElements(); |
