diff options
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCScheduleA2.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCScheduleA2.td b/llvm/lib/Target/PowerPC/PPCScheduleA2.td index 2e41edf8990..1612cd2a0b8 100644 --- a/llvm/lib/Target/PowerPC/PPCScheduleA2.td +++ b/llvm/lib/Target/PowerPC/PPCScheduleA2.td @@ -70,7 +70,7 @@ def PPCA2Itineraries : ProcessorItineraries< InstrItinData<LdStLoad , [InstrStage<1, [XU]>], [6, 1, 1]>, InstrItinData<LdStLoadUpd , [InstrStage<1, [XU]>], - [6, 2, 1, 1]>, + [6, 8, 1, 1]>, InstrItinData<LdStLDU , [InstrStage<1, [XU]>], [6, 1, 1]>, InstrItinData<LdStStore , [InstrStage<1, [XU]>], @@ -86,11 +86,11 @@ def PPCA2Itineraries : ProcessorItineraries< InstrItinData<LdStLFD , [InstrStage<1, [XU]>], [7, 1, 1]>, InstrItinData<LdStLFDU , [InstrStage<1, [XU]>], - [7, 2, 1, 1]>, + [7, 9, 1, 1]>, InstrItinData<LdStLHA , [InstrStage<1, [XU]>], [6, 1, 1]>, InstrItinData<LdStLHAU , [InstrStage<1, [XU]>], - [6, 2, 1, 1]>, + [6, 8, 1, 1]>, InstrItinData<LdStLWARX , [InstrStage<1, [XU]>], [82, 1, 1]>, // L2 latency InstrItinData<LdStSTD , [InstrStage<1, [XU]>], |
