diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/load-partial.ll | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/load-partial.ll b/llvm/test/CodeGen/X86/load-partial.ll index d6f989b07ea..a32705ad8c9 100644 --- a/llvm/test/CodeGen/X86/load-partial.ll +++ b/llvm/test/CodeGen/X86/load-partial.ll @@ -345,3 +345,60 @@ define i32 @load_partial_illegal_type() { ret i32 %4 } +define void @PR43227(i32* %explicit_0, <8 x i32>* %explicit_1) { +; SSE2-LABEL: PR43227: +; SSE2: # %bb.0: +; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] +; SSE2-NEXT: xorps %xmm1, %xmm1 +; SSE2-NEXT: xorps %xmm2, %xmm2 +; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3] +; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; SSE2-NEXT: movlhps {{.*#+}} xmm2 = xmm2[0],xmm0[0] +; SSE2-NEXT: movaps %xmm1, 672(%rsi) +; SSE2-NEXT: movaps %xmm2, 688(%rsi) +; SSE2-NEXT: retq +; +; SSSE3-LABEL: PR43227: +; SSSE3: # %bb.0: +; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero +; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] +; SSSE3-NEXT: xorps %xmm1, %xmm1 +; SSSE3-NEXT: xorps %xmm2, %xmm2 +; SSSE3-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3] +; SSSE3-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; SSSE3-NEXT: movlhps {{.*#+}} xmm2 = xmm2[0],xmm0[0] +; SSSE3-NEXT: movaps %xmm1, 672(%rsi) +; SSSE3-NEXT: movaps %xmm2, 688(%rsi) +; SSSE3-NEXT: retq +; +; SSE41-LABEL: PR43227: +; SSE41: # %bb.0: +; SSE41-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; SSE41-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE41-NEXT: xorps %xmm0, %xmm0 +; SSE41-NEXT: movaps %xmm0, 672(%rsi) +; SSE41-NEXT: movaps %xmm1, 688(%rsi) +; SSE41-NEXT: retq +; +; AVX-LABEL: PR43227: +; AVX: # %bb.0: +; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] +; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX-NEXT: vmovaps %ymm0, 672(%rsi) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retq + %1 = getelementptr i32, i32* %explicit_0, i64 63 + %2 = bitcast i32* %1 to <3 x i32>* + %3 = load <3 x i32>, <3 x i32>* %2, align 1 + %4 = shufflevector <3 x i32> %3, <3 x i32> undef, <2 x i32> <i32 1, i32 2> + %5 = shufflevector <2 x i32> %4, <2 x i32> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %6 = shufflevector <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 undef, i32 0, i32 undef, i32 0>, <8 x i32> %5, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 9, i32 7> + %7 = getelementptr inbounds <8 x i32>, <8 x i32>* %explicit_1, i64 21 + store <8 x i32> %6, <8 x i32>* %7, align 32 + ret void +} |
