diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/bfi.ll | 11 |
2 files changed, 17 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 51f8d562fe1..3c99675a473 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -10398,6 +10398,12 @@ SDValue ARMTargetLowering::PerformCMOVToBFICombine(SDNode *CMOV, SelectionDAG &D auto CC = CCNode->getAPIntValue().getLimitedValue(); SDValue CmpZ = CMOV->getOperand(4); + // The compare must be against zero. + SDValue Zero = CmpZ->getOperand(1); + if (!isa<ConstantSDNode>(Zero.getNode()) || + !cast<ConstantSDNode>(Zero.getNode())->isNullValue()) + return SDValue(); + assert(CmpZ->getOpcode() == ARMISD::CMPZ); SDValue And = CmpZ->getOperand(0); if (And->getOpcode() != ISD::AND) diff --git a/llvm/test/CodeGen/ARM/bfi.ll b/llvm/test/CodeGen/ARM/bfi.ll index 39bcbf2cfec..893fef3add7 100644 --- a/llvm/test/CodeGen/ARM/bfi.ll +++ b/llvm/test/CodeGen/ARM/bfi.ll @@ -158,3 +158,14 @@ define i32 @f12(i32 %x, i32 %y) { %sel = select i1 %cmp, i32 %y2, i32 %or ret i32 %sel } + +define i32 @f13(i32 %x, i32 %y) { +; CHECK-LABEL: f13: +; CHECK-NOT: bfi + %y2 = and i32 %y, 4294967040 ; 0xFFFFFF00 + %and = and i32 %x, 4 + %or = or i32 %y2, 16 + %cmp = icmp eq i32 %and, 42 ; Not comparing against zero! + %sel = select i1 %cmp, i32 %y2, i32 %or + ret i32 %sel +} |
