diff options
6 files changed, 27 insertions, 0 deletions
diff --git a/llvm/include/llvm/Support/TargetOpcodes.def b/llvm/include/llvm/Support/TargetOpcodes.def index 5547938bc13..e30c6e1bfb2 100644 --- a/llvm/include/llvm/Support/TargetOpcodes.def +++ b/llvm/include/llvm/Support/TargetOpcodes.def @@ -285,6 +285,9 @@ HANDLE_TARGET_OPCODE(G_INTRINSIC_TRUNC) /// INTRINSIC round intrinsic. HANDLE_TARGET_OPCODE(G_INTRINSIC_ROUND) +/// INTRINSIC readcyclecounter +HANDLE_TARGET_OPCODE(G_READCYCLECOUNTER) + /// Generic load (including anyext load) HANDLE_TARGET_OPCODE(G_LOAD) diff --git a/llvm/include/llvm/Target/GenericOpcodes.td b/llvm/include/llvm/Target/GenericOpcodes.td index e3037327b64..e252748bd30 100644 --- a/llvm/include/llvm/Target/GenericOpcodes.td +++ b/llvm/include/llvm/Target/GenericOpcodes.td @@ -758,6 +758,12 @@ def G_INTRINSIC_ROUND : GenericInstruction { let hasSideEffects = 0; } +def G_READCYCLECOUNTER : GenericInstruction { + let OutOperandList = (outs type0:$dst); + let InOperandList = (ins); + let hasSideEffects = 1; +} + //------------------------------------------------------------------------------ // Memory ops //------------------------------------------------------------------------------ diff --git a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td index 380fba0e4e3..095c75015d0 100644 --- a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td +++ b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td @@ -119,6 +119,7 @@ def : GINodeEquiv<G_FMINNUM, fminnum>; def : GINodeEquiv<G_FMAXNUM, fmaxnum>; def : GINodeEquiv<G_FMINNUM_IEEE, fminnum_ieee>; def : GINodeEquiv<G_FMAXNUM_IEEE, fmaxnum_ieee>; +def : GINodeEquiv<G_READCYCLECOUNTER, readcyclecounter>; // Broadly speaking G_LOAD is equivalent to ISD::LOAD but there are some // complications that tablegen must take care of. For example, Predicates such diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index d71382868e4..216462ec16a 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1256,6 +1256,8 @@ unsigned IRTranslator::getSimpleIntrinsicOpcode(Intrinsic::ID ID) { return TargetOpcode::G_FSQRT; case Intrinsic::trunc: return TargetOpcode::G_INTRINSIC_TRUNC; + case Intrinsic::readcyclecounter: + return TargetOpcode::G_READCYCLECOUNTER; } return Intrinsic::not_intrinsic; } diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 145e6e872da..f200cf2f0d2 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -2327,4 +2327,14 @@ define void @test_var_annotation(i8*, i8*, i8*, i32) { ret void } +declare i64 @llvm.readcyclecounter() +define i64 @test_readcyclecounter() { + ; CHECK-LABEL: name: test_readcyclecounter + ; CHECK: [[RES:%[0-9]+]]:_(s64) = G_READCYCLECOUNTER{{$}} + ; CHECK-NEXT: $x0 = COPY [[RES]] + ; CHECK-NEXT: RET_ReallyLR implicit $x0 + %res = call i64 @llvm.readcyclecounter() + ret i64 %res +} + !0 = !{ i64 0, i64 2 } diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir index 7695f96bcae..bd8c550e831 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir @@ -124,6 +124,11 @@ # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}} # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected + +# DEBUG-NEXT: G_READCYCLECOUNTER (opcode 61): 1 type index, 0 imm indices +# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined +# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined + # DEBUG-NEXT: G_LOAD (opcode {{[0-9]+}}): 2 type indices, 0 imm indices # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected |
