diff options
23 files changed, 122 insertions, 95 deletions
diff --git a/llvm/include/llvm/Object/COFF.h b/llvm/include/llvm/Object/COFF.h index 5f13137e26e..ebf9bb82f38 100644 --- a/llvm/include/llvm/Object/COFF.h +++ b/llvm/include/llvm/Object/COFF.h @@ -768,6 +768,7 @@ public: uint8_t getBytesInAddress() const override; StringRef getFileFormatName() const override; unsigned getArch() const override; + SubtargetFeatures getFeatures() const override { return SubtargetFeatures(); } import_directory_iterator import_directory_begin() const; import_directory_iterator import_directory_end() const; diff --git a/llvm/include/llvm/Object/ELFObjectFile.h b/llvm/include/llvm/Object/ELFObjectFile.h index 52cde1a0f0f..f93008810a6 100644 --- a/llvm/include/llvm/Object/ELFObjectFile.h +++ b/llvm/include/llvm/Object/ELFObjectFile.h @@ -19,6 +19,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/ADT/Triple.h" #include "llvm/ADT/iterator_range.h" +#include "llvm/MC/SubtargetFeature.h" #include "llvm/Object/Binary.h" #include "llvm/Object/ELF.h" #include "llvm/Object/ELFTypes.h" @@ -51,6 +52,7 @@ class ELFObjectFileBase : public ObjectFile { protected: ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source); + virtual uint16_t getEMachine() const = 0; virtual uint64_t getSymbolSize(DataRefImpl Symb) const = 0; virtual uint8_t getSymbolOther(DataRefImpl Symb) const = 0; virtual uint8_t getSymbolELFType(DataRefImpl Symb) const = 0; @@ -67,6 +69,8 @@ public: elf_symbol_iterator_range symbols() const; static inline bool classof(const Binary *v) { return v->isELF(); } + + SubtargetFeatures getFeatures() const override; }; class ELFSectionRef : public SectionRef { @@ -179,6 +183,7 @@ ELFObjectFileBase::symbols() const { } template <class ELFT> class ELFObjectFile : public ELFObjectFileBase { + uint16_t getEMachine() const override; uint64_t getSymbolSize(DataRefImpl Sym) const override; public: @@ -428,6 +433,11 @@ uint32_t ELFObjectFile<ELFT>::getSymbolAlignment(DataRefImpl Symb) const { } template <class ELFT> +uint16_t ELFObjectFile<ELFT>::getEMachine() const { + return EF.getHeader()->e_machine; +} + +template <class ELFT> uint64_t ELFObjectFile<ELFT>::getSymbolSize(DataRefImpl Sym) const { return getSymbol(Sym)->st_size; } diff --git a/llvm/include/llvm/Object/MachO.h b/llvm/include/llvm/Object/MachO.h index 6a079a964bf..53915a9f0b5 100644 --- a/llvm/include/llvm/Object/MachO.h +++ b/llvm/include/llvm/Object/MachO.h @@ -262,6 +262,7 @@ public: StringRef getFileFormatName() const override; unsigned getArch() const override; + SubtargetFeatures getFeatures() const override { return SubtargetFeatures(); } Triple getArchTriple(const char **McpuDefault = nullptr) const; relocation_iterator section_rel_begin(unsigned Index) const; diff --git a/llvm/include/llvm/Object/ObjectFile.h b/llvm/include/llvm/Object/ObjectFile.h index 0f0f10b8c19..838495657b9 100644 --- a/llvm/include/llvm/Object/ObjectFile.h +++ b/llvm/include/llvm/Object/ObjectFile.h @@ -15,6 +15,7 @@ #define LLVM_OBJECT_OBJECTFILE_H #include "llvm/ADT/StringRef.h" +#include "llvm/MC/SubtargetFeature.h" #include "llvm/Object/SymbolicFile.h" #include "llvm/Support/DataTypes.h" #include "llvm/Support/ErrorHandling.h" @@ -262,6 +263,7 @@ public: virtual StringRef getFileFormatName() const = 0; virtual /* Triple::ArchType */ unsigned getArch() const = 0; + virtual SubtargetFeatures getFeatures() const = 0; /// Returns platform-specific object flags, if any. virtual std::error_code getPlatformFlags(unsigned &Result) const { diff --git a/llvm/include/llvm/Support/ELF.h b/llvm/include/llvm/Support/ELF.h index 352fd8a5cde..5c9acc008dd 100644 --- a/llvm/include/llvm/Support/ELF.h +++ b/llvm/include/llvm/Support/ELF.h @@ -486,6 +486,7 @@ enum : unsigned { EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant. // MIPS machine variant + EF_MIPS_MACH_NONE = 0x00000000, // A standard MIPS implementation. EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900 EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010 EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100 diff --git a/llvm/lib/Object/ELFObjectFile.cpp b/llvm/lib/Object/ELFObjectFile.cpp index c7df30a5903..4bd69e34e3c 100644 --- a/llvm/lib/Object/ELFObjectFile.cpp +++ b/llvm/lib/Object/ELFObjectFile.cpp @@ -55,4 +55,71 @@ ObjectFile::createELFObjectFile(MemoryBufferRef Obj) { return std::move(R); } +SubtargetFeatures ELFObjectFileBase::getFeatures() const { + switch (getEMachine()) { + case ELF::EM_MIPS: { + SubtargetFeatures Features; + unsigned PlatformFlags; + getPlatformFlags(PlatformFlags); + + switch (PlatformFlags & ELF::EF_MIPS_ARCH) { + case ELF::EF_MIPS_ARCH_1: + break; + case ELF::EF_MIPS_ARCH_2: + Features.AddFeature("mips2"); + break; + case ELF::EF_MIPS_ARCH_3: + Features.AddFeature("mips3"); + break; + case ELF::EF_MIPS_ARCH_4: + Features.AddFeature("mips4"); + break; + case ELF::EF_MIPS_ARCH_5: + Features.AddFeature("mips5"); + break; + case ELF::EF_MIPS_ARCH_32: + Features.AddFeature("mips32"); + break; + case ELF::EF_MIPS_ARCH_64: + Features.AddFeature("mips64"); + break; + case ELF::EF_MIPS_ARCH_32R2: + Features.AddFeature("mips32r2"); + break; + case ELF::EF_MIPS_ARCH_64R2: + Features.AddFeature("mips64r2"); + break; + case ELF::EF_MIPS_ARCH_32R6: + Features.AddFeature("mips32r6"); + break; + case ELF::EF_MIPS_ARCH_64R6: + Features.AddFeature("mips64r6"); + break; + default: + llvm_unreachable("Unknown EF_MIPS_ARCH value"); + } + + switch (PlatformFlags & ELF::EF_MIPS_MACH) { + case ELF::EF_MIPS_MACH_NONE: + // No feature associated with this value. + break; + case ELF::EF_MIPS_MACH_OCTEON: + Features.AddFeature("cnmips"); + break; + default: + llvm_unreachable("Unknown EF_MIPS_ARCH value"); + } + + if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16) + Features.AddFeature("mips16"); + if (PlatformFlags & ELF::EF_MIPS_MICROMIPS) + Features.AddFeature("micromips"); + + return Features; + } + default: + return SubtargetFeatures(); + } +} + } // end namespace llvm diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp index e6333f9a4b7..d48cac76c03 100644 --- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp +++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp @@ -325,9 +325,10 @@ void MipsAsmPrinter::EmitFunctionEntryLabel() { if (Subtarget->isTargetNaCl()) EmitAlignment(std::max(MF->getAlignment(), MIPS_NACL_BUNDLE_ALIGN)); - if (Subtarget->inMicroMipsMode()) + if (Subtarget->inMicroMipsMode()) { TS.emitDirectiveSetMicroMips(); - else + TS.setUsesMicroMips(); + } else TS.emitDirectiveSetNoMicroMips(); if (Subtarget->inMips16Mode()) diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll index 9fe694bb582..651fb6ad1f5 100644 --- a/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll +++ b/llvm/test/CodeGen/Mips/Fast-ISel/shift.ll @@ -1,5 +1,5 @@ ; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \ -; RUN: | llvm-objdump -arch mipsel -mcpu=mips32r2 -d - | FileCheck %s +; RUN: | llvm-objdump -d - | FileCheck %s ; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used. diff --git a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll index e4a22820048..f6fef90d01b 100644 --- a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll +++ b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=mipsel -mcpu=mips32r6 -disable-mips-delay-filler < %s | FileCheck %s -; RUN: llc -march=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s -filetype=obj -o - | llvm-objdump -arch=mips -mcpu=mips32r6 -d - | FileCheck %s -check-prefix=ENCODING +; RUN: llc -march=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s \ +; RUN: -filetype=obj -o - | llvm-objdump -d - | FileCheck %s -check-prefix=ENCODING ; bnezc and beqzc have restriction that $rt != 0 diff --git a/llvm/test/CodeGen/Mips/micromips-atomic1.ll b/llvm/test/CodeGen/Mips/micromips-atomic1.ll index 37c3d7682e4..d7c66c27b6e 100644 --- a/llvm/test/CodeGen/Mips/micromips-atomic1.ll +++ b/llvm/test/CodeGen/Mips/micromips-atomic1.ll @@ -1,6 +1,5 @@ ; RUN: llc -march=mipsel -filetype=obj --disable-machine-licm -mattr=micromips < %s -o - \ -; RUN: | llvm-objdump -no-show-raw-insn -arch mipsel -mcpu=mips32r2 -mattr=micromips -d - \ -; RUN: | FileCheck %s -check-prefix=MICROMIPS +; RUN: | llvm-objdump -no-show-raw-insn -d - | FileCheck %s -check-prefix=MICROMIPS ; Use llvm-objdump to check wheter the encodings of microMIPS atomic instructions are correct. ; While emitting assembly files directly when in microMIPS mode, it is possible to emit a mips32r2 diff --git a/llvm/test/MC/Mips/cpload.s b/llvm/test/MC/Mips/cpload.s index 842e0c7937c..3bbad60e578 100644 --- a/llvm/test/MC/Mips/cpload.s +++ b/llvm/test/MC/Mips/cpload.s @@ -1,16 +1,13 @@ # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ASM # -# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+o32 -filetype=obj -o -| \ -# RUN: llvm-objdump -d -r -arch=mips - | \ -# RUN: FileCheck %s -check-prefix=OBJ-O32 +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o -| \ +# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-O32 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -target-abi n32 -filetype=obj -o -| \ -# RUN: llvm-objdump -d -r -arch=mips - | \ -# RUN: FileCheck %s -check-prefix=OBJ-N32 +# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-N32 -# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+n64 -filetype=obj -o -| \ -# RUN: llvm-objdump -d -r -arch=mips - | \ -# RUN: FileCheck %s -check-prefix=OBJ-N64 +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -filetype=obj -o -| \ +# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=OBJ-N64 # ASM: .text # ASM: .option pic2 diff --git a/llvm/test/MC/Mips/cprestore-noreorder-noat.s b/llvm/test/MC/Mips/cprestore-noreorder-noat.s index 25ceac1c63a..07c4dd2ea35 100644 --- a/llvm/test/MC/Mips/cprestore-noreorder-noat.s +++ b/llvm/test/MC/Mips/cprestore-noreorder-noat.s @@ -12,8 +12,7 @@ # RUN: FileCheck %s -check-prefix=NO-STORE # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \ -# RUN: llvm-objdump -d -r - | \ -# RUN: FileCheck %s -check-prefix=NO-STORE +# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=NO-STORE .text .ent foo diff --git a/llvm/test/MC/Mips/cprestore-noreorder.s b/llvm/test/MC/Mips/cprestore-noreorder.s index 1d1997493f5..6740ad92b27 100644 --- a/llvm/test/MC/Mips/cprestore-noreorder.s +++ b/llvm/test/MC/Mips/cprestore-noreorder.s @@ -2,8 +2,7 @@ # RUN: FileCheck %s # RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \ -# RUN: llvm-objdump -d -r -arch=mips - | \ -# RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE +# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=CHECK-FOR-STORE # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \ # RUN: FileCheck %s -check-prefix=MICROMIPS diff --git a/llvm/test/MC/Mips/cprestore-reorder.s b/llvm/test/MC/Mips/cprestore-reorder.s index eeb4e8e99c7..a7fae259318 100644 --- a/llvm/test/MC/Mips/cprestore-reorder.s +++ b/llvm/test/MC/Mips/cprestore-reorder.s @@ -2,8 +2,7 @@ # RUN: FileCheck %s # RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent -filetype=obj -o -| \ -# RUN: llvm-objdump -d -r -arch=mips - | \ -# RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE +# RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=CHECK-FOR-STORE # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+micromips --position-independent -show-encoding | \ # RUN: FileCheck %s -check-prefix=MICROMIPS diff --git a/llvm/test/MC/Mips/cpsetup.s b/llvm/test/MC/Mips/cpsetup.s index 255c1f62019..f858b21ee87 100644 --- a/llvm/test/MC/Mips/cpsetup.s +++ b/llvm/test/MC/Mips/cpsetup.s @@ -1,20 +1,19 @@ -# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 -filetype=obj -o - %s | \ -# RUN: llvm-objdump -d -r -arch=mips64 - | \ -# RUN: FileCheck -check-prefix=ALL -check-prefix=O32 %s +# RUN: llvm-mc -triple mips64-unknown-linux -target-abi o32 -filetype=obj -o - %s | \ +# RUN: llvm-objdump -d -r - | FileCheck -check-prefix=ALL -check-prefix=O32 %s # RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 %s | \ # RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s -# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 -filetype=obj -o - %s | \ -# RUN: llvm-objdump -d -r -arch=mips64 - | \ -# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s +# RUN: llvm-mc -triple mips64-unknown-linux -target-abi n32 -filetype=obj -o - %s | \ +# RUN: llvm-objdump -d -r - | \ +# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s # RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 %s | \ # RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s -# RUN: llvm-mc -triple mips64-unknown-unknown %s -filetype=obj -o - | \ -# RUN: llvm-objdump -d -r -arch=mips64 - | \ -# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s +# RUN: llvm-mc -triple mips64-unknown-linux %s -filetype=obj -o - | \ +# RUN: llvm-objdump -d -r - | \ +# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s # RUN: llvm-mc -triple mips64-unknown-unknown %s | \ # RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s diff --git a/llvm/test/MC/Mips/micromips-el-fixup-data.s b/llvm/test/MC/Mips/micromips-el-fixup-data.s index 34eb7f8d4ee..aa85838339f 100644 --- a/llvm/test/MC/Mips/micromips-el-fixup-data.s +++ b/llvm/test/MC/Mips/micromips-el-fixup-data.s @@ -1,6 +1,6 @@ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \ # RUN: -mattr=+micromips 2>&1 -filetype=obj > %t.o -# RUN: llvm-objdump %t.o -mattr=+micromips -d | FileCheck %s +# RUN: llvm-objdump %t.o -d | FileCheck %s # Check that fixup data is written in the microMIPS specific little endian # byte order. diff --git a/llvm/test/MC/Mips/mips64extins.ll b/llvm/test/MC/Mips/mips64extins.ll deleted file mode 100644 index f29e1f63db4..00000000000 --- a/llvm/test/MC/Mips/mips64extins.ll +++ /dev/null @@ -1,56 +0,0 @@ -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \ -; RUN: | llvm-objdump -disassemble -mattr +mips64r2 - | FileCheck %s - -define i64 @dext(i64 %i) nounwind readnone { -entry: -; CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10 - %shr = lshr i64 %i, 5 - %and = and i64 %shr, 1023 - ret i64 %and -} - -define i64 @dextu(i64 %i) nounwind readnone { -entry: -; CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6 - %shr = lshr i64 %i, 34 - %and = and i64 %shr, 63 - ret i64 %and -} - -define i64 @dextm(i64 %i) nounwind readnone { -entry: -; CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34 - %shr = lshr i64 %i, 5 - %and = and i64 %shr, 17179869183 - ret i64 %and -} - -define i64 @dins(i64 %i, i64 %j) nounwind readnone { -entry: -; CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10 - %shl2 = shl i64 %j, 8 - %and = and i64 %shl2, 261888 - %and3 = and i64 %i, -261889 - %or = or i64 %and3, %and - ret i64 %or -} - -define i64 @dinsm(i64 %i, i64 %j) nounwind readnone { -entry: -; CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1 - %shl4 = shl i64 %j, 10 - %and = and i64 %shl4, 8796093021184 - %and5 = and i64 %i, -8796093021185 - %or = or i64 %and5, %and - ret i64 %or -} - -define i64 @dinsu(i64 %i, i64 %j) nounwind readnone { -entry: -; CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13 - %shl4 = shl i64 %j, 40 - %and = and i64 %shl4, 9006099743113216 - %and5 = and i64 %i, -9006099743113217 - %or = or i64 %and5, %and - ret i64 %or -} diff --git a/llvm/test/MC/Mips/mips64extins.s b/llvm/test/MC/Mips/mips64extins.s new file mode 100644 index 00000000000..3f1973bf52d --- /dev/null +++ b/llvm/test/MC/Mips/mips64extins.s @@ -0,0 +1,9 @@ +# RUN: llvm-mc -arch=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \ +# RUN: | llvm-objdump -disassemble - | FileCheck %s + + dext $2, $4, 5, 10 # CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10 + dextu $2, $4, 34, 6 # CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6 + dextm $2, $4, 5, 34 # CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34 + dins $4, $5, 8, 10 # CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10 + dinsm $4, $5, 10, 1 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1 + dinsu $4, $5, 40, 13 # CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13 diff --git a/llvm/test/MC/Mips/mips_gprel16.s b/llvm/test/MC/Mips/mips_gprel16.s index 9f2d1006f17..a6e09c6c7b0 100644 --- a/llvm/test/MC/Mips/mips_gprel16.s +++ b/llvm/test/MC/Mips/mips_gprel16.s @@ -4,11 +4,9 @@ // field. // RUN: llvm-mc -mcpu=mips32r2 -triple=mipsel-pc-linux -filetype=obj %s -o - \ -// RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \ -// RUN: | FileCheck %s +// RUN: | llvm-objdump -disassemble - | FileCheck %s // RUN: llvm-mc -mcpu=mips32r2 -triple=mips-pc-linux -filetype=obj %s -o - \ -// RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \ -// RUN: | FileCheck %s +// RUN: | llvm-objdump -disassemble - | FileCheck %s .text .abicalls diff --git a/llvm/test/MC/Mips/set-defined-symbol.s b/llvm/test/MC/Mips/set-defined-symbol.s index 54db45da27b..20988779783 100644 --- a/llvm/test/MC/Mips/set-defined-symbol.s +++ b/llvm/test/MC/Mips/set-defined-symbol.s @@ -1,5 +1,5 @@ # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -filetype=obj -o - | \ -# RUN: llvm-objdump -d -r -arch=mips - | FileCheck %s +# RUN: llvm-objdump -d -r - | FileCheck %s .global foo .weak bar diff --git a/llvm/test/Object/Mips/feature.test b/llvm/test/Object/Mips/feature.test index e4d81a159f7..dc0e7ade3fa 100644 --- a/llvm/test/Object/Mips/feature.test +++ b/llvm/test/Object/Mips/feature.test @@ -1,3 +1,4 @@ +RUN: llvm-objdump -disassemble %p/../Inputs/dext-test.elf-mips64r2 | FileCheck %s RUN: llvm-objdump -disassemble -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \ RUN: | FileCheck %s diff --git a/llvm/test/Object/Mips/objdump-micro-mips.test b/llvm/test/Object/Mips/objdump-micro-mips.test index 0f28dc1a5f1..6264d95dac8 100644 --- a/llvm/test/Object/Mips/objdump-micro-mips.test +++ b/llvm/test/Object/Mips/objdump-micro-mips.test @@ -1,3 +1,4 @@ +RUN: llvm-objdump -d %p/../Inputs/micro-mips.elf-mipsel | FileCheck %s RUN: llvm-objdump -d -mattr=micromips %p/../Inputs/micro-mips.elf-mipsel \ RUN: | FileCheck %s diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp index 38550b91530..3beb01ad6eb 100644 --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -931,12 +931,10 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) { const Target *TheTarget = getTarget(Obj); // Package up features to be passed to target/subtarget - std::string FeaturesStr; + SubtargetFeatures Features = Obj->getFeatures(); if (MAttrs.size()) { - SubtargetFeatures Features; for (unsigned i = 0; i != MAttrs.size(); ++i) Features.AddFeature(MAttrs[i]); - FeaturesStr = Features.getString(); } std::unique_ptr<const MCRegisterInfo> MRI( @@ -950,7 +948,7 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) { if (!AsmInfo) report_fatal_error("error: no assembly info for target " + TripleName); std::unique_ptr<const MCSubtargetInfo> STI( - TheTarget->createMCSubtargetInfo(TripleName, MCPU, FeaturesStr)); + TheTarget->createMCSubtargetInfo(TripleName, MCPU, Features.getString())); if (!STI) report_fatal_error("error: no subtarget info for target " + TripleName); std::unique_ptr<const MCInstrInfo> MII(TheTarget->createMCInstrInfo()); |
