diff options
| -rw-r--r-- | lld/ELF/Target.cpp | 11 | ||||
| -rw-r--r-- | lld/test/ELF/amdgpu-relocs.s | 18 |
2 files changed, 23 insertions, 6 deletions
diff --git a/lld/ELF/Target.cpp b/lld/ELF/Target.cpp index 3d16295c230..61a843b170f 100644 --- a/lld/ELF/Target.cpp +++ b/lld/ELF/Target.cpp @@ -1405,17 +1405,16 @@ void AArch64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type, llvm_unreachable("invalid relocation for TLS IE to LE relaxation"); } -// Implementing relocations for AMDGPU is low priority since most -// programs don't use relocations now. Thus, this function is not -// actually called (relocateOne is called for each relocation). -// That's why the AMDGPU port works without implementing this function. void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const { - llvm_unreachable("not implemented"); + assert(Type == R_AMDGPU_REL32); + write32le(Loc, Val); } RelExpr AMDGPUTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const { - llvm_unreachable("not implemented"); + if (Type != R_AMDGPU_REL32) + error("do not know how to handle relocation"); + return R_PC; } ARMTargetInfo::ARMTargetInfo() { diff --git a/lld/test/ELF/amdgpu-relocs.s b/lld/test/ELF/amdgpu-relocs.s new file mode 100644 index 00000000000..6403ca9d6b5 --- /dev/null +++ b/lld/test/ELF/amdgpu-relocs.s @@ -0,0 +1,18 @@ +# RUN: llvm-mc -filetype=obj -triple=amdgcn--amdhsa -mcpu=fiji %s -o %t.o +# RUN: ld.lld -shared %t.o -o %t.so +# RUN: llvm-readobj -r %t.so | FileCheck %s + +# REQUIRES: amdgpu + +# Make sure that the reloc for local_var is resolved by lld. + + .text + +kernel0: + s_mov_b32 s0, local_var+4 + s_endpgm + + .local local_var + +# CHECK: Relocations [ +# CHECK-NEXT: ] |
