diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/pr40529.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/pr40529.ll b/llvm/test/CodeGen/X86/pr40529.ll index 14ae6375d8b..f4bfb7089ad 100644 --- a/llvm/test/CodeGen/X86/pr40529.ll +++ b/llvm/test/CodeGen/X86/pr40529.ll @@ -1,26 +1,26 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s define x86_fp80 @rem_pio2l_min(x86_fp80 %z) { ; CHECK-LABEL: rem_pio2l_min: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: fldt {{[0-9]+}}(%rsp) ; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp) +; CHECK-NEXT: fldt {{[0-9]+}}(%rsp) ; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp) -; CHECK-NEXT: flds {{.*}}(%rip) -; CHECK-NEXT: fmul %st, %st(1) ; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp) +; CHECK-NEXT: flds {{.*}}(%rip) ; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp) +; CHECK-NEXT: fmul %st, %st(1) ; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fxch %st(1) ; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp) |
