summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
-rw-r--r--llvm/test/CodeGen/X86/vector-tzcnt-128.ll8
-rw-r--r--llvm/test/CodeGen/X86/vector-tzcnt-256.ll6
3 files changed, 9 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index d6699c6e678..18c5f60f2f2 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -39603,10 +39603,8 @@ static SDValue combineIncDecVector(SDNode *N, SelectionDAG &DAG) {
if (!VT.is128BitVector() && !VT.is256BitVector() && !VT.is512BitVector())
return SDValue();
- SDNode *N1 = N->getOperand(1).getNode();
APInt SplatVal;
- if (!ISD::isConstantSplatVector(N1, SplatVal) ||
- !SplatVal.isOneValue())
+ if (!isConstantSplat(N->getOperand(1), SplatVal) || !SplatVal.isOneValue())
return SDValue();
SDValue AllOnesVec = getOnesVector(VT, DAG, SDLoc(N));
diff --git a/llvm/test/CodeGen/X86/vector-tzcnt-128.ll b/llvm/test/CodeGen/X86/vector-tzcnt-128.ll
index 0d392bb5117..21142ff3970 100644
--- a/llvm/test/CodeGen/X86/vector-tzcnt-128.ll
+++ b/llvm/test/CodeGen/X86/vector-tzcnt-128.ll
@@ -198,8 +198,8 @@ define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
;
; X32-SSE-LABEL: testv2i64:
; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: movdqa %xmm0, %xmm1
-; X32-SSE-NEXT: psubq {{\.LCPI.*}}, %xmm1
+; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm1
+; X32-SSE-NEXT: paddq %xmm0, %xmm1
; X32-SSE-NEXT: pandn %xmm1, %xmm0
; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; X32-SSE-NEXT: movdqa %xmm0, %xmm2
@@ -401,8 +401,8 @@ define <2 x i64> @testv2i64u(<2 x i64> %in) nounwind {
;
; X32-SSE-LABEL: testv2i64u:
; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: movdqa %xmm0, %xmm1
-; X32-SSE-NEXT: psubq {{\.LCPI.*}}, %xmm1
+; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm1
+; X32-SSE-NEXT: paddq %xmm0, %xmm1
; X32-SSE-NEXT: pandn %xmm1, %xmm0
; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; X32-SSE-NEXT: movdqa %xmm0, %xmm2
diff --git a/llvm/test/CodeGen/X86/vector-tzcnt-256.ll b/llvm/test/CodeGen/X86/vector-tzcnt-256.ll
index 59911e5805b..c7087037e01 100644
--- a/llvm/test/CodeGen/X86/vector-tzcnt-256.ll
+++ b/llvm/test/CodeGen/X86/vector-tzcnt-256.ll
@@ -116,7 +116,8 @@ define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
;
; X32-AVX-LABEL: testv4i64:
; X32-AVX: # %bb.0:
-; X32-AVX-NEXT: vpsubq {{\.LCPI.*}}, %ymm0, %ymm1
+; X32-AVX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
+; X32-AVX-NEXT: vpaddq %ymm1, %ymm0, %ymm1
; X32-AVX-NEXT: vpandn %ymm1, %ymm0, %ymm0
; X32-AVX-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; X32-AVX-NEXT: vpand %ymm1, %ymm0, %ymm2
@@ -238,7 +239,8 @@ define <4 x i64> @testv4i64u(<4 x i64> %in) nounwind {
;
; X32-AVX-LABEL: testv4i64u:
; X32-AVX: # %bb.0:
-; X32-AVX-NEXT: vpsubq {{\.LCPI.*}}, %ymm0, %ymm1
+; X32-AVX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
+; X32-AVX-NEXT: vpaddq %ymm1, %ymm0, %ymm1
; X32-AVX-NEXT: vpandn %ymm1, %ymm0, %ymm0
; X32-AVX-NEXT: vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; X32-AVX-NEXT: vpand %ymm1, %ymm0, %ymm2
OpenPOWER on IntegriCloud