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-rw-r--r--llvm/include/llvm/IR/PatternMatch.h8
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp12
-rw-r--r--llvm/test/Transforms/InstCombine/vector-xor.ll10
3 files changed, 19 insertions, 11 deletions
diff --git a/llvm/include/llvm/IR/PatternMatch.h b/llvm/include/llvm/IR/PatternMatch.h
index bb225443848..80225846664 100644
--- a/llvm/include/llvm/IR/PatternMatch.h
+++ b/llvm/include/llvm/IR/PatternMatch.h
@@ -347,6 +347,14 @@ struct is_negative {
inline cst_pred_ty<is_negative> m_Negative() { return cst_pred_ty<is_negative>(); }
inline api_pred_ty<is_negative> m_Negative(const APInt *&V) { return V; }
+struct is_nonnegative {
+ bool isValue(const APInt &C) { return C.isNonNegative(); }
+};
+
+/// \brief Match an integer or vector of nonnegative values.
+inline cst_pred_ty<is_nonnegative> m_NonNegative() { return cst_pred_ty<is_nonnegative>(); }
+inline api_pred_ty<is_nonnegative> m_NonNegative(const APInt *&V) { return V; }
+
struct is_power2 {
bool isValue(const APInt &C) { return C.isPowerOf2(); }
};
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 4b3a58126d5..2f4e97cb92a 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -2284,16 +2284,18 @@ Instruction *InstCombiner::visitXor(BinaryOperator &I) {
// the 'not' by inverting the constant and using the opposite shift type.
// Canonicalization rules ensure that only a negative constant uses 'ashr',
// but we must check that in case that transform has not fired yet.
- const APInt *C;
- if (match(NotVal, m_AShr(m_APInt(C), m_Value(Y))) && C->isNegative()) {
+ Constant *C;
+ if (match(NotVal, m_AShr(m_Constant(C), m_Value(Y))) &&
+ match(C, m_Negative())) {
// ~(C >>s Y) --> ~C >>u Y (when inverting the replicated sign bits)
- Constant *NotC = ConstantInt::get(I.getType(), ~(*C));
+ Constant *NotC = ConstantExpr::getNot(C);
return BinaryOperator::CreateLShr(NotC, Y);
}
- if (match(NotVal, m_LShr(m_APInt(C), m_Value(Y))) && C->isNonNegative()) {
+ if (match(NotVal, m_LShr(m_Constant(C), m_Value(Y))) &&
+ match(C, m_NonNegative())) {
// ~(C >>u Y) --> ~C >>s Y (when inverting the replicated sign bits)
- Constant *NotC = ConstantInt::get(I.getType(), ~(*C));
+ Constant *NotC = ConstantExpr::getNot(C);
return BinaryOperator::CreateAShr(NotC, Y);
}
}
diff --git a/llvm/test/Transforms/InstCombine/vector-xor.ll b/llvm/test/Transforms/InstCombine/vector-xor.ll
index 99c25ce134f..8c7ccc1a713 100644
--- a/llvm/test/Transforms/InstCombine/vector-xor.ll
+++ b/llvm/test/Transforms/InstCombine/vector-xor.ll
@@ -132,9 +132,8 @@ define <4 x i32> @test_v4i32_not_ashr_negative_splatconst(<4 x i32> %a0) {
define <4 x i32> @test_v4i32_not_ashr_negative_const(<4 x i32> %a0) {
; CHECK-LABEL: @test_v4i32_not_ashr_negative_const(
-; CHECK-NEXT: [[TMP1:%.*]] = ashr <4 x i32> <i32 -3, i32 -5, i32 -7, i32 -9>, [[A0:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 -1, i32 -1, i32 -1, i32 -1>
-; CHECK-NEXT: ret <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = lshr <4 x i32> <i32 2, i32 4, i32 6, i32 8>, [[A0:%.*]]
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%1 = ashr <4 x i32> <i32 -3, i32 -5, i32 -7, i32 -9>, %a0
%2 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %1
@@ -166,9 +165,8 @@ define <4 x i32> @test_v4i32_not_lshr_nonnegative_splatconst(<4 x i32> %a0) {
define <4 x i32> @test_v4i32_not_lshr_nonnegative_const(<4 x i32> %a0) {
; CHECK-LABEL: @test_v4i32_not_lshr_nonnegative_const(
-; CHECK-NEXT: [[TMP1:%.*]] = lshr <4 x i32> <i32 3, i32 5, i32 7, i32 9>, [[A0:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 -1, i32 -1, i32 -1, i32 -1>
-; CHECK-NEXT: ret <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = ashr <4 x i32> <i32 -4, i32 -6, i32 -8, i32 -10>, [[A0:%.*]]
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%1 = lshr <4 x i32> <i32 3, i32 5, i32 7, i32 9>, %a0
%2 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %1
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